ADLINK Express-BASE7 Carrier Board Quick Deployment and Debugging Guide

ADLINK Express-BASE7 Carrier Board Quick Deployment and Debugging Guide

Why choose COM Express carrier solution

In the fields of industrial control, edge computing and communication equipment, the product forms are diverse, and it is time-consuming and laborious to completely customize the motherboard. The modular design of COM Express integrates core processors, memory, and critical I/O on standardized modules, while peripheral interfaces are implemented through custom carrier boards, retaining customization flexibility and significantly reducing development cycles. ADLINK's Express-BASE7 is a standard ATX sized carrier board designed specifically for COM Express Type 7 modules, supporting up to 32 PCIe channels and four 10GbE networks, making it an ideal prototype platform for building high-performance edge servers.

This article is based on the Express-BASE7 user manual, providing engineers with a practical guide that can be directly implemented from hardware deployment, power configuration, jumper settings, debugging methods to common problems.

Quick Overview of Core Features

Express-BASE7 follows the PICMG COM. 0 Rev. 3.0 specification and supports Type 7 modules in Basic and Compact sizes. Its key features include:

32 PCIe lanes: flexibly allocated through one x16 dedicated slot (for 10GbE daughter cards), one standard x16 slot, and two x8 slots.

10GbE Expansion: A dedicated x16 slot (non-standard PCIe signal) can convert the module's four 10GBASE-KR channels into SFP+fiber or BASE-T copper cable interfaces, compatible with SFP+cards or BASE-T cards.

NC-SI and IPMI BMC: The onboard MiniBMC supports remote management (power status, voltage monitoring, power on/off, serial port redirection), and the functions are customized according to the project.

LPC Super I/O: Using Winbond W83627DHG-PT, it provides traditional COM ports and PS/2 keyboard and mouse to compensate for the lack of Super I/O in the module.

Secondary SPI BIOS: The BIOS on the module or the backup SPI Flash on the carrier board can be selected through jumper cables for easy testing of new versions or recovery of damaged BIOS.

Integrated debugging port: Two bit POST code display and four bit address display, supporting single step execution mode, greatly facilitating low-level debugging.

Mechanical and Layout

The board adopts standard ATX size (305mm × 244mm), and the key positioning holes are precisely positioned with COM Express connectors (AB and CD sockets). In terms of layout, the power connector is located on the right side of the board, the PCIe slots are concentrated in the middle and lower parts, and the debugging interfaces and jumpers are distributed at the edge of the board for easy operation.

Detailed explanation of connectors and jumpers

4.1 Power connectors and strategies

Express-BASE7 uses two power inputs:

CN1 (ATX 24 pin): Provides power to peripheral circuits (Super I/O, fans, USB, etc.) on the motherboard.

CN5 (ATX 12V 4-pin): Specially designed to provide 12V power supply for COM Express modules. The system must be connected to both interfaces simultaneously in order to start up properly. Attention: Even when using a 20 pin ATX power supply, the 4-pin plug must be inserted into the CN5 and must not be plugged in incorrectly.

There are two power modes, ATX and AT, which can be selected through jumper JP1 (1-2 for ATX, 2-3 for AT). In AT mode, the PS-ON # signal is directly grounded, and it starts up immediately upon power on (without standby). The specific power strategy depends on the power type and jumper combination. The manual provides four combination tables (ATX power+ATX mode, ATX power+AT mode, etc.).

Other power related jumpers:

JP2 (PS-ON # signal source): Select SUS_S3 # (default) or SUS_S5 # from the module to determine the PS-ON # behavior of the system during sleep/shutdown.

JP3 (5VSB source): Select 5V standby voltage from the carrier board itself, ATX power supply, or module itself.

JP34 (12V to module in S3/S5 state): By default, 12V is cut off in S3/S5, and can be jumper to provide constant power supply.

Engineering tip: Before powering on for the first time, be sure to confirm the JP1 and JP2 settings, especially when using AT power, to avoid accidental forced power on or inability to shut down.

4.2 COM Express Board to Board Connectors (AB/CD)

Two 220 pin connectors fully comply with the Type 7 definition. The CD connector carries 32 PCIe lanes, four 10GBASE-KR, SATA, USB 3.0, and NC-SI signals. AB connectors include GbE, LPC, SMBus, power management, etc. Please refer to Table 1 in the manual for all pin definitions. Engineers should strictly follow this when designing custom carrier boards.

4.3 PCIe slot allocation

PCIEKR (Dedicated 10GbE Slot): A non-standard x16 slot, signal connected to a 10GBASE-KR differential pair of modules, used to insert SFP+or BASE-T daughter cards provided by ADLINK. This slot provides signals such as I2C, interrupt, and PHY control simultaneously.

PCIE 16 (standard x16): Adjacent to PCIEKR, but with a standard PCIe x16 signal (PCIe Lane 15-31 from module).

PCIE 1 (x8): from Lane 0-7.

PCIE 2 (x8): from Lane 8-15.

All PCIe slots support clock, reset, and SMBus management, with specific pin definitions detailed in the table. Attention: Some slots may have sideband signals (such as WAKE, PRSNT), and unused pins remain suspended.

4.4 Common I/O connectors

GbE (CN18): Standard RJ-45, GBE0 for connecting modules, pin definitions comply with IEEE 802.3.

SATA (CN12/CN13): Two 7-pin SATA interfaces, supporting standard SATA signals.

USB 3.0 (CN45): Four port USB 3.0 Type-A, backward compatible with USB 2.0.

Serial port (CN1002): DB9 socket, COM3/COM4 from Super I/O (note: SER0/SER1 of the module is led out by CN6/CN7, and needs to be connected to MiniBMC through jumper to achieve SOL).

PS/2 (CN19): Provides keyboard and mouse interfaces (upper and lower layers).

LPC debugging head (CN37): 20 pins, which leads out LPC bus signals for easy connection to logic analyzers or debugging cards. The onboard two digit POST code LED directly displays the BIOS boot code.

I2C (CN33) and SMBus (CN34): Provide independent user access buses and enable buffer isolation through jumper JP19~JP22.

4.5 Key jumper configuration

In addition to power related jumpers, the following jumpers are crucial for debugging:

JP23/JP24 (BIOS selection): The default settings are 1-2 (module BIOS selection). If you need to use the spare SPI BIOS (U55) on the carrier board, set JP23 to 1-2 and JP24 to 2-3. At this point, it is necessary to insert the SPI Flash chip containing BIOS into the U55 socket.

JP4 (Clear CMOS): Short circuit 2-3 to clear CMOS settings and restore default.

JP18 (Super I/O enabled): default 1-2 enabled; If the module comes with Super I/O or needs to be disabled, it can be skipped to 2-3.

JP10/JP11: Set the Super I/O base address (2Eh/4Eh) and clock (48MHz/24MHz), usually keeping them as default.

CN1003/CN1004: Choose whether to connect the serial signal directly to DB9 (RS232) or to MiniBMC (for Serial over LAN), default RS232.

For I2C/SMBus, JP19~JP22 control buffer bypass (default buffer pass), JP29~JP31 set the address bits of I2C EEPROM, usually keeping the default.

Debugging and diagnostic tools

5.1 POST code and indicator light

There are two seven segment digital tubes (LEDs) in the upper right corner of the board that display the POST code of the LPC bus, making it easy to locate BIOS startup phase faults. The adjacent LED1 (5VSB), LED3 (PWR), LED20 (HDD), and LED23 (S3) indicate power and activity status.

5.2 Module Type Identification

The right row (LED6-11, LED24) automatically identifies the module type (Type 1/2/3/4/5/6/7 or incorrect) based on the TYPE pin combination of the module, helping to confirm compatibility between the module and the carrier board.

5.3 Digital I/O LED

LED12~LED19 correspond to the 8 GPIO of CN41. When the corresponding pins are at high level, they light up for easy observation of I/O status.

5.4 Single Step Execution Mode

The BIOS can be switched to single step execution mode through jumper wires, and with the help of onboard micro switches (S5? Actually, S5 is a MiniBMC reset, and single step should be described separately. The manual mentions "by jumper selection" but does not define it clearly, so it is speculated to be implemented through jumper wires), BIOS instructions can be executed one by one, which is extremely suitable for low-level firmware debugging.

5.5 MiniBMC Remote Management

MiniBMC (U502) comes with SPI Flash storage firmware, and selects normal/debug mode through the CN46~CN49 jumper. Debug messages are output through the CN1001 serial port. It communicates with the network controller through NC-SI and supports functions such as Seria over LAN, voltage monitoring, and power control. But the manual states that this feature is customized by project and not standard.

Detailed explanation of 10GbE daughter card expansion

The most distinctive design of Express-BASE7 is the PCIEKR dedicated slot for connecting 10GbE daughter cards. ADLINK offers two options:

SFP+card: converts four 10GBASE-KR signals into SFP+optical interfaces, suitable for long-distance fiber optic transmission.

BASE-T card: Convert to standard RJ-45 copper cable with 10GBASE-T interface, compatible with existing cabling.

The daughter card is connected to the KR differential pair of the module through a slot (corresponding pins in the C/D rows), while providing MDIO/I2C management bus, interrupt, and status LED signals. Before installation, it is necessary to confirm that the module supports four-way 10G Ethernet (such as Intel Xeon-D or Atom C3000 series).

Common deployment issues and solutions

Q1: There is no response when the system is powered on, and the power fan is not running?

Check if both ATX 24 pin and ATX 12V 4-pin are connected; Confirm that JP1 is in ATX mode (1-2) and JP2 is in default SUS_S3 # (1-2); Check if the power supply is functioning properly.

Q2: Unable to start after selecting the backup BIOS for the carrier board?

Confirm that the correctly burned SPI Flash has been inserted into U55 and that JP23/JP24 settings are correct (1-2 and 2-3). Clear CMOS (JP4 short circuit 2-3) and try again.

Q3: 10GbE daughter card not recognized?

Confirm that the module used supports 10GBASE-KR and the daughter card is installed properly; Check the signal integrity of the PCIEKR slot; Confirm that the corresponding port is enabled in the module BIOS.

Q4: OST code display abnormal, unable to continue?

Refer to the POST code table (see module manual for details), check the memory and CPU power supply; Use LPC debugging head (CN37) to capture bus signal analysis.

Q5: Is the MiniBMC function invalid?

Confirm whether the project firmware supports it; Check the settings of jumper wires CN46~CN49; If debugging is required, connect to the serial port through CN1001 and observe the startup information.

Design and Development Suggestions

Reference design: ADLINK provides the complete schematic and mechanical files of Express-BASE7, which can be downloaded from the official website as a starting point for customizing the carrier board.

Power budget: ATX 12V 4-pin only provides module power supply. If the peak power consumption of the module exceeds 75W, a higher specification power supply needs to be considered.

Heat dissipation: The board reserves three 4-pin fan interfaces, with FAN3 controlled by module PWM and FAN1/2 controlled by Super I/O, which can be dynamically adjusted according to system load.

Expansion card compatibility: x16 and x8 slots support standard PCIe cards, but please note that some high-power graphics cards require additional power supply (the card does not provide auxiliary power and needs to be resolved by oneself).