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ADLINK Express-BASE7 Carrier Board Quick Deployment and Debugging Guide

F: | Au:FANS | DA:2026-07-10 | 478 Br: | 🔊 点击朗读正文 ❚❚ ▶ | Share:

All PCIe slots support clock, reset, and SMBus management, with specific pin definitions detailed in the table. Attention: Some slots may have sideband signals (such as WAKE, PRSNT), and unused pins remain suspended.

4.4 Common I/O connectors

GbE (CN18): Standard RJ-45, GBE0 for connecting modules, pin definitions comply with IEEE 802.3.

SATA (CN12/CN13): Two 7-pin SATA interfaces, supporting standard SATA signals.

USB 3.0 (CN45): Four port USB 3.0 Type-A, backward compatible with USB 2.0.

Serial port (CN1002): DB9 socket, COM3/COM4 from Super I/O (note: SER0/SER1 of the module is led out by CN6/CN7, and needs to be connected to MiniBMC through jumper to achieve SOL).

PS/2 (CN19): Provides keyboard and mouse interfaces (upper and lower layers).

LPC debugging head (CN37): 20 pins, which leads out LPC bus signals for easy connection to logic analyzers or debugging cards. The onboard two digit POST code LED directly displays the BIOS boot code.

I2C (CN33) and SMBus (CN34): Provide independent user access buses and enable buffer isolation through jumper JP19~JP22.

4.5 Key jumper configuration

In addition to power related jumpers, the following jumpers are crucial for debugging:

JP23/JP24 (BIOS selection): The default settings are 1-2 (module BIOS selection). If you need to use the spare SPI BIOS (U55) on the carrier board, set JP23 to 1-2 and JP24 to 2-3. At this point, it is necessary to insert the SPI Flash chip containing BIOS into the U55 socket.

JP4 (Clear CMOS): Short circuit 2-3 to clear CMOS settings and restore default.

JP18 (Super I/O enabled): default 1-2 enabled; If the module comes with Super I/O or needs to be disabled, it can be skipped to 2-3.

JP10/JP11: Set the Super I/O base address (2Eh/4Eh) and clock (48MHz/24MHz), usually keeping them as default.

CN1003/CN1004: Choose whether to connect the serial signal directly to DB9 (RS232) or to MiniBMC (for Serial over LAN), default RS232.

For I2C/SMBus, JP19~JP22 control buffer bypass (default buffer pass), JP29~JP31 set the address bits of I2C EEPROM, usually keeping the default.


Debugging and diagnostic tools

5.1 POST code and indicator light

There are two seven segment digital tubes (LEDs) in the upper right corner of the board that display the POST code of the LPC bus, making it easy to locate BIOS startup phase faults. The adjacent LED1 (5VSB), LED3 (PWR), LED20 (HDD), and LED23 (S3) indicate power and activity status.

5.2 Module Type Identification

The right row (LED6-11, LED24) automatically identifies the module type (Type 1/2/3/4/5/6/7 or incorrect) based on the TYPE pin combination of the module, helping to confirm compatibility between the module and the carrier board.

5.3 Digital I/O LED

LED12~LED19 correspond to the 8 GPIO of CN41. When the corresponding pins are at high level, they light up for easy observation of I/O status.

5.4 Single Step Execution Mode

The BIOS can be switched to single step execution mode through jumper wires, and with the help of onboard micro switches (S5? Actually, S5 is a MiniBMC reset, and single step should be described separately. The manual mentions "by jumper selection" but does not define it clearly, so it is speculated to be implemented through jumper wires), BIOS instructions can be executed one by one, which is extremely suitable for low-level firmware debugging.

5.5 MiniBMC Remote Management

MiniBMC (U502) comes with SPI Flash storage firmware, and selects normal/debug mode through the CN46~CN49 jumper. Debug messages are output through the CN1001 serial port. It communicates with the network controller through NC-SI and supports functions such as Seria over LAN, voltage monitoring, and power control. But the manual states that this feature is customized by project and not standard.

Detailed explanation of 10GbE daughter card expansion

The most distinctive design of Express-BASE7 is the PCIEKR dedicated slot for connecting 10GbE daughter cards. ADLINK offers two options:

SFP+card: converts four 10GBASE-KR signals into SFP+optical interfaces, suitable for long-distance fiber optic transmission.

BASE-T card: Convert to standard RJ-45 copper cable with 10GBASE-T interface, compatible with existing cabling.

The daughter card is connected to the KR differential pair of the module through a slot (corresponding pins in the C/D rows), while providing MDIO/I2C management bus, interrupt, and status LED signals. Before installation, it is necessary to confirm that the module supports four-way 10G Ethernet (such as Intel Xeon-D or Atom C3000 series).


Common deployment issues and solutions

Q1: There is no response when the system is powered on, and the power fan is not running?

Check if both ATX 24 pin and ATX 12V 4-pin are connected; Confirm that JP1 is in ATX mode (1-2) and JP2 is in default SUS_S3 # (1-2); Check if the power supply is functioning properly.

Q2: Unable to start after selecting the backup BIOS for the carrier board?

Confirm that the correctly burned SPI Flash has been inserted into U55 and that JP23/JP24 settings are correct (1-2 and 2-3). Clear CMOS (JP4 short circuit 2-3) and try again.

Q3: 10GbE daughter card not recognized?

Confirm that the module used supports 10GBASE-KR and the daughter card is installed properly; Check the signal integrity of the PCIEKR slot; Confirm that the corresponding port is enabled in the module BIOS.

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