In key task areas such as industrial control, telecommunications infrastructure, military electronics, and rail transit, the 6U CompactPCI (cPCI) platform has always held a core position in embedded computing due to its high reliability, modular design, hot swappable capability, and long lifecycle support. The cPCI-6840 series single board computer (SBC) launched by ADLINK Technology is a high-performance 6U cPCI solution based on Intel Pentium M processor and 855GME/6300ESB chipset. This series not only supports 64 bit/66 MHz PCI bus, but also integrates dual PMC expansion bits, three-way Gigabit Ethernet, IPMI management controller, and rich I/O interfaces, making it an ideal choice for system upgrades and new projects in many demanding application scenarios.
Product series overview and model differentiation
The cPCI-6840 series includes two main SBC models and multiple Rear Transition Modules (RTM) to meet different front and rear I/O configuration requirements:
CPCI-6840: Standard model, equipped with two PMC stations (one above and one below), front panel without VGA/PS2 interface, suitable for displaying and keyboard mouse signals through RTM.
CPCI-6840V: The front panel comes with a DB-15 VGA interface and a PS2 keyboard/mouse combination interface, only retaining the PMC2 station above (PMC1 is occupied below), suitable for single slot applications that require front display and local control.
The matching RTM includes:
CPCI-R6840: Provides SCSI rear I/O (requires PMC-8631 SCSI PMC module) and DVI interface;
CPCI-R6841: Provides 2.5-inch HDD mounting slots, CF slots, and standard rear I/O (dual USB, dual GbE, COM2, VGA, PS2);
CPCI-R6841P: Added PIM (PMC Interface Module) socket on the basis of R6841 for rear I/O expansion of telecom PMC module.
Engineers need to combine and confirm the selection based on the functional requirements of the front and rear panels, the type of storage medium (HDD/CF/SSD), and whether SCSI or PIM expansion is needed.
Core hardware architecture and bus characteristics
1. Processor and chipset
The cPCI-6840 is equipped with the Intel Pentium M processor (μ FC-PGA2 package), with a clock speed covering 1.3 GHz to 2.0 GHz, and can be optionally equipped with low voltage (LV) or ultra-low voltage (ULV) versions (BGA package, OEM only). The processor is equipped with 1 MB or 2 MB on-chip L2 cache and a front-end bus of 400 MHz. The chipset adopts a low-power embedded combination: 855GME graphics memory controller (supporting DDR333 SDRAM, up to 2 GB, through two 200 pin SO-DIMM slots) and 6300ESB I/O controller hub, which provides dual PCI buses (64 bit/66 MHz and 32-bit/33 MHz), greatly improving I/O bandwidth.
2. CompactPCI bus interface
The core highlight is the PLX PCI-6540 three mode universal PCI-PCI bridge, which supports transparent, non transparent and universal modes. Through this bridge, cPCI-6840 can work in both system slots (as a host) and peripheral slots (as an intelligent subsystem), and complies with the PICMG 2.1 hot plug specification, supporting hot plug in peripheral slots and effectively reducing the mean time to repair (MTTR). The bridge also supports asynchronous operation of master-slave buses (such as mixing 66 MHz and 33 MHz), and is compatible with 64 bit and 32-bit data width conversion.
3. Storage interface
Primary IDE: Directly onboard 44 pin 2.5-inch HDD connector, installed in the lower PMC position (occupying PMC1).
Secondary IDE: Connected to RTM via J5 connector, RTM provides a 44 pin HDD interface and CompactFlash Type II slot (both share channels and can only be used with two devices simultaneously).
SATA: RTM provides two SATA interfaces (R6840/R6841 only), supporting a transfer rate of 150 MB/s.
4. Gigabit Ethernet
Onboard three channel GbE:
LAN1/LAN2: Using Intel 82546GB dual port controller, it is mounted on a 64 bit/66 MHz PCI bus and connected to the backplane (compliant with PICMG 2.16 packet switching backplane specification) or RTM panel (selected through the dip switch on RTM) through J3.
LAN3: Using Intel 82541PI controller, connected to 32-bit/33 MHz PCI bus, with RJ-45 interface provided on the front panel, dedicated for system management or on-site debugging.
5. Other I/O
USB 2.0: Four ports (two on the front panel and two on RTM), with 0.5 A overcurrent protection for each port.
Serial ports: COM1 (front panel RJ-45, DTE configuration) and COM2 (RTM panel RJ-45).
Video: 855GME integrated graphics card, supports analog VGA and LVDS (via J3 or RTM), cPCI-6840V front panel provides DB-15.

Jumper settings and key configurations
Proper configuration of jumpers and switches is a prerequisite for ensuring the normal operation of SBC. The following are the most critical settings:
1. JP1: Force System Slot Enable (SYSEN #)
Default (open circuit): Automatically recognize system/peripheral mode based on backplane SYSEN # signal.
Short circuit (1-2 or 2-3): Force SYSEN # to be pulled low, causing SBC to start as a system slot. Important warning: If this board is inserted into the peripheral slot but JP1 is short circuited, it may cause bus conflicts. Be cautious.
Application scenario: When there is no PCI bus on the backplane (such as a pure Ethernet switching backplane), JP1 needs to be short circuited to allow the board to operate independently.
2. JP3: Clear CMOS
Normal mode: The jumper cap is placed 1-2.
Clear mode: Move the jumper cap to 2-3 and hold for a few seconds to restore the default BIOS settings.
Operation steps: Power off and unplug the board → Short circuit 2-3 → Restore to 1-2 → Power on again.
3. Micro switch for front panel lower ejector
This switch combines power control and hot plug status notification:
System slot: When the lower ejector is closed, the system is powered on; Trigger the power button signal when turned on.
Peripheral slot: Close the switch when inserted, and the board is powered on; Send an ENOM # interrupt to the system upon opening, notifying a hot pull request.
4. LAN channel selection on RTM (SW1-SW4)
Due to the simultaneous connection of LAN1/LAN2 to J3 (backplane 2.16) and RTM panel RJ-45, they cannot be used simultaneously. By default, all SW1-SX4 are set to ON at the factory, indicating that LAN1/LAN2 will be guided to the rear panel of RTM; If you need to connect to the PICMG 2.16 backplane switch, you need to set all switches to OFF. All switches must remain in the same state (fully ON or fully OFF).
5. VGA Enable on RTM (SW5)
SW5 defaults to all ON and allows rear VGA signal output; If set to OFF, the rear VGA is disabled.
6. CompactFlash Master/Slave Settings (CN9 or CN8)
The CF slot shares the bus with the secondary IDE. By setting CF as Master or Slave (default Slave) through jumper wires, it is necessary to ensure that the master-slave of the two devices on the bus do not conflict.
Hardware installation steps and precautions
1. Installation of CPU and heat sink
The Pentium M processor must be paired with a dedicated heat sink. During installation, it is necessary to evenly apply thermal grease and tighten the heat sink screws in the order shown in the diagram to ensure that the heat sink is in full contact with the CPU core. If using the low-voltage BGA version (OEM), there is no need for users to install it.
2. Memory installation
Only PC2700 (DDR333) ECC registration SO-DIMM is supported, with a maximum capacity of 1 GB per piece (using 512 Mb pellets), and a maximum capacity of 2 GB for two pieces combined. During installation, be careful to prevent accidental gaps and ensure that the module is fully inserted and locked.
3. Hard disk installation
CPCI-6840: Secure the 2.5-inch HDD to the lower PMC position (occupying PMC1) with four screws, and connect the 44 pin IDE cable to CN6.
CPCI-6840V: Install HDD in PMC1 position, but first install HDD bracket and then fix three screws.
RTM installation (cPCI-R6841): Place the HDD on the surface of the RTM component, align the mounting holes, tighten the four screws from the back, and connect the IDE cable.
4. PMC module installation
Both PMC slots (J11/J21) of cPCI-6840 support 64 bit/66 MHz and only support 3.3V or universal voltage (not 5V dedicated modules). Before installation, remove the front panel filler, align the PMC module with the socket and press it in, then fix it with bolts from the bottom of the board. Note: The Jn4 rear I/O on PMC (PMC2) can be connected to J5 (RTM) for SCSI or PIM expansion.
5. Matching RTM with motherboard
Be sure to confirm that the RTM model matches the motherboard (e.g. R6840 provides DVI/SCSI, R6841 provides HDD/CF). Key Warning: Inserting an incompatible RTM may result in circuit damage. Meanwhile, for I/O devices that support both front and rear panels (such as VGA, USB, keyboard and mouse), it is not allowed to use both front and rear connectors at the same time, as this may cause signal conflicts.
6. Insert the entire board into the chassis
First, ensure that the chassis slot is correct (system or peripheral), turn off the ejector and hear a "click" sound. The blue hot swappable LED will light up and wait for it to turn off (indicating stable power supply), then lock the upper and lower ejectors and tighten the fixing screws.
Operating System and Driver Installation Suggestions
Officially supports Windows 2000/XP/Server 2003, Red Hat Linux 9, and VxWorks 5.5. The recommended installation sequence is:
Install Windows system (fresh installation).
Chipset driver: Run cPCI cPCI-6840 Chipset infins_enu.exe from the CD and restart.
VGA driver: Execute VGA win2k_xp142.exe and select a typical installation.
LAN driver: Run LAN PRO2KXP.exe and install Intel PROSet tool.
For Linux and VxWorks BSP, please contact ADLINK to obtain separate support packages.
Programming and Application of Watchdog Timer (WDT)
WDT is integrated into the 6300ESB South Bridge and provides two-level timeout protection, which is a key mechanism for embedded systems to achieve self recovery. Its core features:
35 bit down counter with a resolution of 1 μ s to 10 minutes.
The first level timeout triggers IRQ (or SMI, but this board does not support SMI), and the second level timeout drives the WDT_TOUT # pin reset system.
Supports WDT mode (two-level) and free running mode (level only, automatic reload).
Programming steps (example):
BIOS startup: Enter BIOS → Integrated Peripherals → Onboard Device → Watch Dog Timer → Enabled.
Configure WDT:
Set WDT_TOUT # function instead of GPO32 (GPOBASE+0x30 bit0=0).
Configure prescaler (bit2), interrupt type (bit1:0), and output enable (bit5).
Get base address: Read the BAR register (offset 0x10) of the PCI configuration space (bus 0, device 29, function 4).
Load preset value: Write count values to BAR+0x00 (preset 1) and BAR+0x04 (preset 2) (to unlock: write 0x00 → 0x86 to BAR+0x00C).
Start timer: Set WDT Lock register (offset 0x68) with bit1=1 enabled, bit0=0 unlocked (or read-only), and bit2=0 to select WDT mode.
Feed the dog (reload): Regularly execute the unlock sequence, then write 1 to bit 8 of BAR+0x0C to reload the counter.
Practical tip:
The flashing WDT LED (yellow) indicates that the timer has been activated.
If using the free running mode, there is no need to feed the dog, but only a reset (without interruption) is generated.
ADLINK provides the DOS tool HRWDT.EXE for quick testing of WDT functionality.

IPMI Intelligent Platform Management Interface
The cPCI-6840 board is based on the Atmel ATMEGA128L substrate management controller (BMC), following the IPMI v1.5 specification and supporting the PICMG 2.9 system management bus. Main functions:
Sensor monitoring: system temperature, 3.3V/5V/12V voltage, BMC watchdog, etc.
Remote power control: achieve remote power on, power off, and reset through OEM commands.
IPMB address mapping: Automatically allocate IPMB addresses (0xB0 to 0xEC) based on the geographic address (GA [4:0]) of the backplane, supporting single box multi master control.
Common OEM commands (network function code 0xC0):
Command code functionality
OemShowRevision 0x12 Query firmware version and product ID
OemResetHost 0xF5 Remote Reset System
OemPowerOff 0xF6 remote shutdown
OemPowerOn 0xF7 remote boot
OemReportGeoAddress 0xF0 reports IPMB address and GA status
Known limitations: BMC does not have built-in RTC, and the timestamp is reset every time it is powered on; SDR records are stored in Flash and cannot be accessed randomly.
Environmental specifications and power requirements
Working temperature: 0 to 55 ° C (requires forced air cooling of the chassis, recommended 50 CFM).
Storage temperature: -20 to 80 ° C.
Humidity: 5% to 95% (without condensation).
Vibration (working): 0.5 Grms (5-500 Hz), limited when equipped with HDD.
Impact (non working): 15G peak, 11ms.
Typical power consumption: Under the configuration of Pentium M 1.6G+512 MB RAM+20GB HDD,+5V is about 10.0A,+3.3V is about 4.1A,+12V is about 0.2A, and the total power is about 61.2W.
Common troubleshooting and engineering recommendations
System unable to power on/blue LED not lit: check if the ejector is fully closed; Check if the backplane power supply is normal; If it is in the peripheral slot, confirm that the back panel ENOM # signal is normal.
After inserting the board, the system does not recognize it: confirm whether the JP1 setting matches the slot type (the system slot needs to be disconnected, and the peripheral slot needs to be disconnected, unless there is no PCI backplane).
The network at the rear of RTM is not working: Check if all SW1-SX4 are turned on (RTM mode) or off (2.16 mode) and consistent with the backplane design.
VGA without display (rear): Confirm that SW5 is ON; if using front VGA (only 6840V), make sure that the rear is not connected at the same time.
Watchdog not working: WDT option in BIOS must be enabled; And confirm that GPO32 has been switched to WDT_TOUT # function.
PMC module not working: Confirm that the module voltage is 3.3V or universal (5V dedicated module will be damaged); Check if the PMC installation is in place and if the bolts are tightened.
