ADLINK PCIe-7396 Digital I/O Card Deployment Guide

ADLINK PCIe-7396 96 Channel Digital I/O Card Deployment and Configuration Guide

In the fields of industrial automation control, equipment status monitoring, and parallel data acquisition, the reliability and flexibility of high-density digital I/O channels directly determine the system response speed and scalability. ADLINK's PCIe-7396 is a 96 bit parallel digital I/O card based on the PCI Express bus. It provides up to 12 8-bit ports through 2 to 4 8255 programmable peripheral interface (PPI) chips onboard, each port can be independently configured as an input or output, and supports 48mA high current drive, external trigger acquisition, change of state (COS) interrupt, and dual interrupt source system. This article provides a complete deployment and development reference for system integration engineers, starting from hardware installation, register programming, interrupt configuration, timing/counter applications, and common debugging points.

Overview of Card Board and Hardware Installation

PCIe-7396 adopts PCI Express x1 interface, which complies with plug and play specifications. The system BIOS automatically allocates I/O addresses and IRQ resources without manual jumper settings. Its core specifications include:

I/O channel: 96 TTL compatible digital I/O channels, led out through a 100 pin SCSI connector (AMP 787082-9)

Drive capability: minimum output high level 2.4V (typical 5V), maximum output low level 0.5V; high current up to 48mA/channel, pulling current 15mA/channel

Input threshold: High level 2.0~5.25V, low level 0~0.8V, input leakage current ± 8mA

Timer/Counter: 1 8254 programmable timer/counter chip, supporting cascaded 32-bit timers and event counters

Interrupt system: Dual interrupt sources (INT1/INT2), optional COS interrupt, edge triggered interrupt, or timed/counted interrupt

Power consumption: Typical 450mA (+3.3V or+5V depending on PCIe slot power supply)

Size: 138.96 × 98.4 mm (half height PCB)

Installation steps:

Turn off the PC power, remove the chassis cover, and select an idle PCIe x1/x4/x8/x16 slot.

Touch the metal of the chassis to release static electricity, hold the edge of the card board, do not touch the components and gold fingers.

Insert the card board into the slot and press it firmly, then fix it to the chassis cover with screws.

If you need to use an external terminal board (DIN-100S direct connection, DIN-96DI isolated input, DIN-96DO isolated output), connect the SCSI cable as needed.

After powering on, the operating system automatically recognizes the device and installs the ADLINK MAPS Core driver package (download the latest version from the official website).

Attention: By default, all I/O ports on the card board are powered on to a low level (which can be independently configured to a high level or floating through jumpers JA1~JC4, as detailed below).

Connector and Port Mapping

The 100 pin SCSI connector (CN1) provides all 96 I/O points, and its pin naming convention is PnXb:

n: PPI number (1-4)

X: Port names (A, B, C), each PPI contains 3 8-bit ports

b: Position number (0~7)

For example, P1C4 represents the 4th bit of port C in PPI1. The connector provides two dedicated signals simultaneously:

Pin 99 (EXTTRG): External trigger input used to synchronously capture digital input data

Pin 51 (EVENT): External event source, connected to the input of counter # 0 8254

Port allocation:

PPI1: P1A (pins 1-8) P1B（9~16）、P1C（17~24）

PPI2：P2A（26~33）、P2B（34~41）、P2C（42~49）

PPI3: P3A (51~58), P3B (59~66), P3C (67~74) - where P3A's Pin51 is reused as EVENT

PPI4: P4A (76~83), P4B (84~91), P4C (92~99) - where P4C's Pin99 is reused as EXTTRG

The remaining pins are GND (25, 50, 75, 100).

Jumper configuration and power on status

PCIe-7396 supports setting the default output level of each port independently through jumper wires (applicable to the moment of power on or uninitialized phase):

JA1~JA4: corresponding to ports A of PPI1~PPI4 respectively

JB1~JB4: corresponding to ports B of PPI1~PPI4 respectively

JC1~JC4: corresponding to ports C of PPI1~PPI4 respectively

Each jumper provides three modes (taking JA1 as an example):

1-2 Short circuit: The port is powered on to a low level (default)

2-3 Short circuit: When the port is powered on, it is at a high level

Jumper cap removed: port in high impedance state (floating)

This function is particularly important when driving external relays or LED indicator lights - to avoid momentary misoperation when powered on, it is recommended to set the safety level according to the load type.

Register programming and port control

The register mapping of PCIe-7396 (relative to the base address BASE) is divided into three categories: PPI data/control registers, interrupt control registers, and timing/counter registers.

4.1 PPI Digital Data Register (BASE+0x00, 0x10, 0x20, 0x30)

The 24 bit I/O data of each PPI is accessed through three 8-bit registers (low address corresponds to port A,+1 corresponds to port B,+2 corresponds to port C). Writing data sets the output, while reading data reads the current level (supports output state readback).

4.2 PPI Control Register (BASE+0x04, 0x14, 0x24, 0x34)

Write only, used to configure port direction. The control bits for each port (bits 0-2 correspond to ports A, B, and C respectively): write 1 as the output and write 0 as the input. Other positions are reserved.