ADLINK cPCI-6520 Core i7 Processor Blade Engineering Application Guide

ADLINK cPCI-6520 Core i7 Processor Blade Engineering Application Guide

In application fields such as military industry, communication, transportation, and industrial automation, which have strict requirements for reliability, computing performance, and long life cycle, the 6U CompactPCI platform has always occupied an important position due to its sturdy mechanical structure, excellent heat dissipation performance, and flexible expansion capability. ADLINK's cPCI-6520 is a 6U CompactPCI single slot processor blade based on the third-generation Intel Core i7 processor. It integrates powerful computing power, rich I/O interfaces, and flexible expansion options within a standard 4HP (20.32mm) width. This article will systematically review the core technical characteristics, hardware installation steps, key interface configurations, and system debugging points of the blade from an engineering application perspective.

Overview of Product Positioning and Core Features

CPCI-6520 is designed specifically for embedded computing systems that require high-performance computing and reliable communication. Its core adopts the third-generation Core i7 processor with 22nm technology (optional quad core i7-3615QE/3612QE or dual core i7-3555LE/3517UE), paired with the mobile Intel QM77 chipset, providing strong computing power.

In terms of memory, the blade supports dual channel DDR3-1333/1600 ECC SDRAM, with a total capacity of up to 16GB. One channel uses an SO-CDIMM slot (up to 8GB), while the other channel uses onboard soldered memory (up to 8GB). The support of ECC memory greatly improves data integrity and system stability, which is crucial for critical task applications.

It is worth mentioning that cPCI-6520 complies with multiple PICMG standards, including PICMG 2.0 (core specification), 2.1 (hot swappable), 2.9 (system management bus), and 2.16 (packet switched backplane), ensuring its compatibility with various standard CompactPCI chassis and backplanes. At the same time, the blade supports running as the main control device in the system slot and can also run in independent blade mode (Satellite Mode) in the peripheral slot, with extremely high flexibility.

Onboard storage options and installation practices

Storage configuration is an important aspect of embedded system design. CPCI-6520 provides a variety of flexible storage solutions to meet the performance, capacity, and reliability requirements of different application scenarios.

CompactFlash card installation

The cPCI-6520 board comes with a CompactFlash slot, suitable for using industrial grade CF cards as bootable or data disks. When installing, flip the blade to the bottom facing up, unscrew the two fixing screws, and remove the CF card fixing bracket. Then flip it back to the front, align the CF card with the slot, and push it in to ensure that it is plugged in properly. Finally, reinstall the fixed bracket and tighten the screws.

Installation of 2.5-inch SATA hard drive/solid-state drive

For applications that require large capacity storage, cPCI-6520 provides a SATA 6 Gb/s direct connector for installing 2.5-inch hard drives or solid-state drives. When installing, first connect the included DB-LSATA daughter card to the interface of the 2.5-inch drive, then install the drive onto the mounting bracket and tighten the four screws. Next, align the drive assembly with the onboard SATA connector (CN9) and insert it smoothly. Finally, secure the drive bracket to the blade with two screws.

CFast card installation and coexistence rules

For scenarios that pursue higher read and write speeds and reliability, cPCI-6520 can support CFast cards through the optional DB CFast adapter kit. It should be noted that CFast cards and 2.5-inch SATA drives share the same physical space and cannot be installed simultaneously. During installation, insert the CFast card into the adapter board, then connect the adapter board as a whole to the onboard SATA connector position and secure it with two screws. This design allows engineers to flexibly switch storage media based on project stages or application scenarios.

PMC/XMC Expansion and Configuration Points

CPCI-6520 provides a combined PMC/XMC extension site, greatly enhancing its functionality and scalability. This site supports 32/64 bit, 33/66/133MHz PMC cards, or XMC cards based on PCIe x8 channels.

Installation steps:

Firstly, remove the PMC/XMC filling baffle from the front panel. Then, align the connectors of the PMC/XMC module with the corresponding connectors on the board and press them evenly to ensure a tight fit. Finally, fix the module onto the board using the built-in installation screws.

Key configuration jumper:

To ensure the normal operation of PMC/XMC modules, engineers need to correctly set the onboard configuration switch according to the module specifications:

SW-PMC1 (PMC Frequency/Mode Switch): Used to set the bus bit width, frequency, and mode of the PMC site. For example, the default states are 64 bit bus, PCI 33MHz, PCI-X mode, and 133MHz. If using a 32-bit PMC card or running in 66MHz PCI mode, this switch needs to be adjusted accordingly.

SW_VIO1 (PMC VIO Voltage Switch): Used to set the I/O signal voltage of the PMC site. The default is 3.3V (short circuited 2-3). If the PMC card requires a 5V signal level, this switch needs to be set to 5V (short circuit 1-2).

PMC -12V support note: Please note that pin 2 of PMC connector JN1 of cPCI-6520 does not provide -12V power supply. If the installed PMC module relies on -12V power supply, it is necessary to confirm in advance and contact ADLINK technical support for more information.

Detailed explanation of key interfaces and mode configuration

Proper configuration of onboard interfaces is the foundation of system integration. CPCI-6520 provides a wide range of I/O interfaces, and the configuration of some key interfaces requires special attention from engineers.

1. Serial interface configuration

The front panel COM1 port provides RS-232/422/485 multi protocol support through an RJ-45 connector. Its working mode is controlled by the onboard switch SW12:

RS-232 (default): SW12 1st bit ON, 2nd bit OFF.

RS-422: SW12 1st bit ON, 2nd bit ON.

RS-485: SW12 1st bit OFF, 2nd bit ON.

When connecting RS-422/485 devices, ensure that the pin definitions of the DB-9 to RJ-45 cable match. Pin 4 (TXD/RX+) and pin 8 (DTR #/RX -) of the RJ-45 interface of COM1 define the direction of data transmission and reception in RS-422/485 mode.

2. IPMC and System Management

CPCI-6520 supports IPMI based system management functionality. The onboard switch SW-POD1 is used to define the operating mode of the blade:

2nd OFF: When the system chassis does not include a Chassis Management Module (CMM), IPMI runs in "no CMM mode" (default).

2nd ON: When the system includes CMM, it needs to be set to ON to enable IPMI to run in "CMM mode".

4th OFF (default): The power on/off status is controlled by a pop-up handle. Unless there are special requirements, it is not recommended to change this setting.

3. Display output configuration

The front panel of cPCI-6520 provides two dual-mode DisplayPort interfaces, which can output DVI, VGA, or HDMI signals through adapter cables. But there is an important limitation: if any of the Display Ports on the front panel are converted to DVI or HDMI output, the blade can only support up to two independent display outputs, and the display output (VGA) routed to the rear I/O will be automatically disabled. This constraint needs to be fully considered in system design.

Heat dissipation design and power considerations

High performance processors bring significant power consumption and heat dissipation challenges. The cPCI-6520 adopts a passive heat sink design, and its heat dissipation performance is highly dependent on the overall air duct design of the chassis.

1. Power consumption data reference

The power consumption of different types of CPUs varies significantly. Taking the quad core i7-3615QE (TDP 45W) as an example, when running at full load on Windows 7 system, the total power consumption measured is about 77W (5V current 13.04A, 3.3V current 2.8A). The lowest power consumption dual core i7-3517UE (TDP 17W) has a total power consumption of approximately 43.6W under the same conditions. Engineers should refer to the power consumption data under the worst-case conditions and reserve sufficient margin when selecting power modules and designing chassis heat dissipation.

2. Suggestions for heat dissipation design

To ensure stable operation of the system in high load and high temperature environments, it is necessary to ensure sufficient forced air cooling airflow through the heat sink inside the chassis. The specific relationship between air volume and temperature should refer to the official "temperature vs airflow" curve chart. For high-power CPU configurations, it is recommended to choose fans with higher speeds or optimize the air duct design to ensure that the CPU temperature does not exceed its maximum junction temperature (Tjunction, MAX) of 105 ° C.

BIOS setup and debugging skills

CPCI-6520 adopts AMI BIOS and provides rich configuration options.

1. Enter BIOS and navigation

After booting up, press the<DEL>key to enter the BIOS settings interface. In the Super IO Configuration under the Advanced menu, interrupt numbers and I/O addresses for four serial ports can be configured. The Serial Port Console redirection feature allows engineers to remotely manage BIOS and operating systems through a serial port terminal, making it extremely practical in scenarios without a graphics card or remote debugging.

2. Watchdog timer

CPCI-6520 integrates a watchdog timer based on Winbond SuperIO. Engineers can control the start stop and timeout settings of the watchdog by calling the relevant I/O port (base address 2Eh) through the application program. ADLINK provides a demonstration program under DOS and C language example code, demonstrating how to configure timeout values and periodically "feed dogs" to prevent unexpected system resets. This feature is crucial for enhancing the self-healing ability of the system in unmanned environments.

3. Restore default BIOS

The onboard Load BIOS Default button (SW1) can restore the factory default settings with one click when the system cannot start due to BIOS settings errors, avoiding the tedious operation of disassembling the battery and clearing the CMOS.

Precautions for Engineering Deployment

Hot plug operation specification: cPCI-6520 supports hot plug. Before removing the blade, the blue HotSwap LED indicator light on the front panel should be observed first. When the LED flashes rapidly (0.1s on, 0.9s off), it indicates that the system is preparing to turn off the power to the slot. When the LED is constantly on, it indicates that the blade is ready to be safely removed.

POST code diagnosis: The 8 universal LEDs on the front panel display POST codes in binary form by default, which is a powerful tool for quickly locating hardware initialization faults. For example, if the LED displays "01110101", then the corresponding output value for Port 80h is "75h". Engineers can interpret these codes based on the Checkpoint table in the user manual appendix.

Anti static and mechanical installation: When operating blades, be sure to do so on an anti-static workbench and wear an anti-static wristband. When installing the blade to the chassis, align the upper and lower guide rails with the chassis slot, smoothly push it in, and ensure that the rear panel connector (J1-J5) is reliably plugged into the backplane.