Kepco BOP 1000M Troubleshooting Application

Resistive load bandwidth: 13.5kHz

10 μ F load bandwidth: 16.3kHz (non-uniformity leads to even larger bandwidth)

Rise time: 32 μ s (resistive)/95 μ s (capacitive)

Load recovery time (from infinity to rated resistance): approximately 100 μ s

The MC series is opposite to the ML series in voltage mode - the bandwidth may increase with capacitive loads, but the stability decreases, so it needs to be corrected through internal compensation capacitors.

4.2 Internal user installation of compensating capacitors

The MC model provides optional compensation capacitor positions internally (non user adjustable external pins). The user needs to open the chassis and find the solder pad labeled Ccomp on the motherboard. They can select capacitors with different capacitance values according to the table below to reduce the voltage mode bandwidth and improve stability. For example, BOP 20-10MC:

Compensation capacitor bandwidth (kHz)

1nF 11.5

2.2nF 9.0

4.7nF 7.5

15nF 3.5

33nF 2.2

47nF 1.3

100nF 0.5

Safety warning: Before opening the chassis for internal modifications, the AC power must be disconnected and wait for at least 5 minutes for the internal capacitors to discharge. It is recommended to have a qualified electronic engineer operate it, otherwise it may damage the equipment or cause personal injury.

4.3 Troubleshooting of MC series: Output oscillation

Fault phenomenon: When unloaded or with capacitive load, the output voltage exhibits a continuous sine wave or peak oscillation of 10kHz~50kHz.

Reason: The load capacitance value exceeds the maximum rated value of MC (10mF), or the compensation capacitor is not installed/the selected value is too small.

Exclusion steps:

Verify whether the total load capacitance (including cable parasitic capacitance) is ≤ 10mF.

Check if internal compensation capacitors are installed. If not, select 47nF or 100nF as the starting point according to the table above.

Connecting a 10 Ω~100 Ω resistor in series at the voltage feedback end (remote detection of the rear terminal) can increase the phase margin.

If the load is a pure capacitor without parallel resistance, it is recommended to parallel a minimum power resistor (R ≥ rated voltage ²/10W) at both ends of the load to provide a DC discharge path.

Chapter 5: Application and Driver Integration of Solar Cell Testing (I-V Trace)

5.1 Traditional difficulties in completing I-V curve testing on a single machine

The characterization of solar panels requires scanning the output voltage from short circuit to open circuit, while measuring the current. The traditional solution requires a programmable electronic load (or power supply) to be paired with two digital multimeters (DVMs) and solves the problem of synchronous triggering. This not only incurs high costs, but also results in uneven curves due to cable noise and trigger jitter.

The Kepco BOP 1KW series is equipped with a built-in waveform generator and high-speed measurement capability, coupled with the free LabVIEW sub VI, allowing for complete I-V Trace and Dark I-V testing with just one BOP without the need for an external DVM.

5.2 Testing Principles and Advantages

BOP operates in voltage source mode, scanning from 0 to Voc (open circuit voltage) according to the set step size. At each step, BOP simultaneously measures the output voltage and output current (internal high-precision ADC), and returns the data points to the upper computer. Key Performance:

Scanning speed: 20ms per point (far faster than the second level response of DVM+electronic loads)

No trigger line required: Measurement and stepping are completely synchronized within the BOP, with no external jitter

Energy feedback: When testing the power generation status of the solar panel, the power absorbed by the BOP is fed back to the grid rather than dissipated as heat

In addition, dark current testing requires negative bias, and the four quadrant capability of BOP can seamlessly output negative voltage, scanning the reverse characteristics of the diode.

5.3 Troubleshooting: I-V Curve Distortion

Phenomenon: The I-V curve obtained from scanning shows steps or jumps near the maximum power point.

Reason: Resonance between the inductance of the test connection line and the output capacitance of the BOP, or noise coupling caused by strong light exposure on the tested panel.

resolvent:

Use a four wire Kelvin connection to separate the voltage detection line from the current line.

Connect a 0.1 μ F~1 μ F thin film capacitor in parallel at the BOP output (to absorb high-frequency noise).

Reduce the scanning step size or increase the dwell time for each step size (default 20ms can be adjusted to 50ms).

Chapter 6: Programming Control, Calibration, and Common Fault Codes

6.1 Communication Interface and Instruction Set

BOP 1KW has built-in standard GPIB (IEEE 488.2) and supports RS232. All models accept SCPI (Standard Commands for Programmable Instruments) command set and provide VISA driver program. Typical command example:

VOLT 50 sets the voltage to+50V

VOLT -25 sets the voltage to -25V

CURR 10 sets the current limit to 10A

OUTP ON enables output

MEAS:VOLT? Read back the actual voltage

For advanced users, ± 10V analog control can also be performed through the rear analog interface (50 terminal port). The main channel uses -10V to+10V corresponding to full negative to full positive output, and the limiting channel uses 0.05V to 10V corresponding to positive direction limiting.