ADLINK cPCI-6910 Dual Core Xeon Single Board Computer Deployment Guide

ADLINK cPCI-6910 Dual Core Xeon Single Board Computer Hardware Deployment and Management Guide

In the fields of military communication, data center servers, and high reliability industrial control, the 6U CompactPCI platform has always held a key position due to its robust modular design, hot swappable capability, and long lifecycle support. The cPCI-6910 series single board computer launched by ADLINK is equipped with dual core Intel ®  Xeon ®  Low Voltage (LV) or Ultra Low Voltage (ULV) processors, paired with server grade Intel ®  E7520 chipset and Intel ®  6300ESB I/O control center, providing excellent computing density and energy efficiency ratio. This board complies with PICMG 2.0, 2.1, 2.9, and 2.16 specifications, supports IPMI v1.5, and can be optionally equipped with cPCI-R6910 (SAS/SATA) or cPCI-R6911 (SCSI RAID) rear wiring modules to expand storage and network capabilities. This article will provide a complete practical reference for system integration engineers from the perspectives of hardware architecture, installation steps, jumper/switch configuration, BIOS tuning, driver deployment, watchdog timer programming, and IPMI remote management.

Overview of Product Positioning and Technical Specifications

CPCI-6910 adopts a 6U single slot (4HP) size and supports Dual Core Intel with a 478 pin micro FCPGA package ®  Xeon ®  Processor, optional models include:

LV 2.0 GHz (low voltage)

LV 1.66 GHz

ULV 1.66 GHz (ultra-low voltage)

All are equipped with 2MB on-chip L2 cache, 667 MHz front-end bus, and 65nm technology, balancing performance and power consumption. Onboard 1GB or 2GB DDR2-400 registered ECC memory (directly soldered, non slot), maximum 2GB. The chipset is powered by Intel ®  E7520 Memory Control Hub (MCH) and 6300ESB I/O Control Hub, providing PCI Express ®  Interface, dual channel Ultra ATA -100, four USB 2.0 ports, two serial ports, VGA and PS/2 keyboard/mouse.

Network and Storage:

Front panel: Two Gigabit Ethernet (Intel) ®  82571EB，PCIe x4）， The other two are extended through RTM;

Onboard 44 pin IDE interface (main channel), RTM provides secondary channel and CF slot;

CPCI-R6910 RTM supports Serial ATA (SATA) and Serial Attached SCSI (SAS);

CPCI-R6911 RTM supports Ultra 320 SCSI (LSI53C1020) and RAID 0/1/1E.

Management features:

Optional BMC (ATmega128L-8AU), supporting IPMI v1.5, including sensor monitoring, event logging, and remote power control;

Hardware monitoring (IT8712F) real-time monitoring of voltage, temperature, and fan speed;

Watchdog timer (integrated into 6300ESB, two-level programmable).

Detailed explanation of hardware installation steps

1. CPU installation

The CPU socket on the board is equipped with a locking screw, which needs to be unlocked by rotating counterclockwise with a flathead screwdriver. Align the golden triangle of the CPU with the triangular mark on the socket, gently insert it, and then lock it clockwise. Note: Only supports a single processor and cannot install dual channels.

2. Installation of heat sink

Special heat sinks are included in the packaging, covering the CPU and Northbridge chip. Remove the protective film from the thermal pad before installation, align the heat sink with the hole position, and gradually tighten it diagonally with four screws to ensure even contact. Ensure a forced air cooling of 30 CFM to meet the heat dissipation requirements.

3. Memory (soldering) and storage

The memory has been soldered onto the board and does not require user installation. In terms of storage, a 2.5-inch IDE or SATA hard drive can be installed (via the included DB-6910IDE/DB-6910SAT adapter board), or CompactFlash can be used ®  Card (via DB-6910CF adapter board). Attention should be paid during installation:

First, fix the four hexagonal bolts onto the HDD, and then connect the adapter board to the HDD;

Align the HDD component vertically with the board to board connector, gently press down, secure the adapter board with two screws, and then lock the HDD with four screws from the back of the board;

When removing the HDD, also pull it up vertically to avoid damaging the connector.

For the SAS hard drive (cPCI-R6910) on RTM, it is necessary to first stick an insulating film on the bottom of the tray, then fix the hard drive and connect the DB-R6910SAS adapter board.

4. CF card installation

Insert the CF card into the slot of the DB-6910CF adapter, then press the adapter vertically into the board to board connector, secure it with two screws, and finally install the buckle cover.

5. Insert the board into the chassis

Insert cPCI-6910 into the system slot or peripheral slot (supports universal mode), align the upper and lower edges with the guide rail, gently push in, close the push rod, and tighten the panel screws. The RTM insertion method is similar, but it is important to note that the rear cables should not be squeezed by the chassis structure.

Jumper, switch, and front and rear routing configuration

There are multiple DIP switches on the board and RTM for configuring serial port mode, clearing CMOS, routing Gigabit Ethernet, etc.

1. Clear CMOS (SWZ1)

There is a touch switch on the board that can be pressed to clear the CMOS configuration and restore default settings.

2. COM and IPMI mode (SWZ2)

The four bits of SWZ2 are used to select the serial port working mode:

COM mode: 1-ON, 2-ON, 3-OFF, 4-OFF (default)

IPMI mode: 1-OFF, 2-OFF, 3-ON, 4-ON

When set to IPMI mode, this serial port is used for BMC management channels.

3. System slot/peripheral slot and pre charging (SW1)

SW1 is used for debugging and special configuration (different PCB versions have different functions):

B2 and earlier versions: SW1-3 ON can disable pre charging, allowing the board to start even when there is no system board in the peripheral slot; SW1-4 ON is SYSTEM # enabled.

B3 and updated versions: SW1-1 ON disables CMM control; SW1-3 ON disables pre charging; SW1-4 ON enables the board to simulate a system board in the peripheral slot.

4. Front panel push rod switch

This micro switch is used for power supply and hot plug control. Close the push rod in the system slot before powering on; Opening the push rod will send a power button signal. In the peripheral slot, after closing the push rod, send the ENOM # interrupt notification system. When opening, also send the ENOM # and wait for the system command.

5. RTM Gigabit Router (cPCI-R6910/R6911)

RTM provides two additional gigabit ports (GbE3, GbE4), which can be connected to the backplane (PICMG 2.16) or the rear panel RJ-45 through DIP switches.

CPCI-R6911: SWY1/SWY2 controls GbE3, SWY3/SWX4 controls GbE4; All OFF is the back panel, and all ON (default) is the rear panel.

CPCI-R6910: SWZ1/SWZ2 controls GbE3, SWZ3/SWZ4 controls GbE4, with the same rules as above.

Attention: The front and back cannot be used simultaneously and must be set uniformly.

6. CF master-slave setting (SWY5 of cPCI-R6911)

SWY5 bits 3 and 4: default 3-ON (Slave) and 4-ON (Master), can be adjusted as needed.

Core points of BIOS settings

BIOS is based on Phoenix Award, press<Del>to enter when booting up. The following are key configuration items:

1. Standard CMOS

Set system date/time to automatically detect IDE devices. Hard disk parameters (cylinder, head, sector, etc.) can be manually set, supporting LBA mode.

2. Advanced BIOS Features

Hard disk boot priority: Select the preferred boot hard disk.

CPU L1/L2 Cache: It is recommended to keep it enabled.

Quick Power On Self Test: Accelerate POST.

Startup sequence: LS120, HDD, CDROM, USB, LAN, etc. can be set.

Boot Up NumLock Status: can be set to On or Off.

Gate A20 Option: Recommend Fast.

Security Option: Can be set to either Setup (password required to enter BIOS) or System (password required to boot up).

Console redirection: When enabled, POST information can be viewed remotely through the serial port, and the baud rate (default 115200) and connection mode (null modem) can be set.

Agent Connect via: Supports null mode.

3. Advanced Chipset

System BIOS Cacheable, Video BIOS Cacheable: It is recommended to enable them to improve performance.

Delay Prior to Thermal: Set the delay for entering thermal control mode, utilizing Xeon's built-in thermal monitoring function.

DRAM Data Integrity Mode: Displays the current ECC or non ECC mode (read-only).

4. Integrated Peripherals

Onboard LAN Boot ROM: Enable PXE network boot.

On Chip IDE submenu: Block mode, PIO mode (Auto recommended), UDMA support, and SATA mode (Combined/Enhanced/SATA Only) can be enabled.

Onboard Devices: Configure USB 2.0 controller, USB keyboard support (to be enabled under DOS), BIOS write protection (recommended disabled for upgrade).

Watch Dog Timer: Enable/disable WDT output for 6300ESB.

Super IO: Set the base address and IRQ of serial port 1/2 (default COM1=3F8/IRQ4, COM2=2F8/IRQ3).

5. PnP/PCI configuration

Reset Configuration Data: If there is a conflict during the installation of a new card, it can be set to Enabled.

Resources Controlled by: Auto (ESCD) or Manual (Manual allocation of IRQ).

PCI/VGA Palette Snoop: Non standard VGA cards need to be enabled.

6. Frequency/Voltage Control

Spread Spectrum: Enabling it can reduce EMI, but may affect clock accuracy, depending on the environment.

7. Load Fail Safe default value

When the system fails to start due to incorrect settings, loading the Fail Safe default value can restore the basic runnable state.

8. Password setting

Administrator and user passwords can be set, up to a maximum of 8 characters. Clear CMOS to remove password.

9. Save and Exit

Save changes and exit, or discard changes and exit.

Driver installation process

Suggest installing in the following order (applicable to Windows 2000/XP):

Chipset driver (Intel E7520/6300ESB) - Run Setup from the chipset directory on ADLINK CD.

VGA driver (ATI ES1000) - manually updated in Device Manager, pointing to the INF file (C2_29263. inf) in the ES1000 directory on the CD.

LAN driver (Intel 82571EB) - Run the installation program.

SAS driver (cPCI-R6910 uses LSI controller) or SCSI driver (cPCI-R6911 uses LSI53C1020), select the corresponding driver according to the RTM model.

For Linux/VxWorks BSP, please contact ADLINK for support.

Programming and usage of watchdog timer (WDT)

The WDT of cPCI-6910 is integrated with Intel ®  6300ESB， Supports two-level timers with resolutions ranging from 1 μ s to 10 minutes. Workflow:

Level 1: Load preset value 1, count down, timeout triggers interrupt (IRQ/SMI/SCI).

Level 2: Load the preset value 2, count again, timeout drives the WDT_TOUT # pin to pull low, triggering a system reset.

Supports free running mode (using only preset value 2, automatic reload).

Configuration steps (brief description):

Enable Watchdog (Integrated Peripherals → Onboard Devices → Watch Dog Timer) in BIOS.

Get the memory base address (BAR, offset 10H).

Write preset value 1 (BAR+00H) and preset value 2 (BAR+04H) according to the unlocking sequence (write 80H, 86H to BAR+0CH).

Configure WDT control register (offset 60-61H): Select pre frequency division (1 μ s-1s or 1ms-1min) and interrupt type.

Set WDT lock register (offset 68H): Bit 2 selects mode (0=WDT, 1=free run), bit 1 enables, bit 0 locks.

To prevent timeout, the counter needs to be reloaded through the RELOAD bit (bit 8) of BAR+0CH before resetting to zero.

In addition, it is necessary to switch the WDT_TOUT # signal from GPO32 to WDT function (GPOBASE+30H bit0=0), and enable the reset circuit through GPO57 control (reset is effective when GPOBASE+38H bit57=0).

ADLINK provides the DOS testing tool HRWDT.EXE, which can be used as a reference.

IPMI Remote Management and OEM Commands

The onboard BMC (ATmega128L-8AU) supports IPMI v1.5 and provides the following key features:

Device ID, cold/hot reset, self-test results, and ACPI power status management;

Setting and resetting the watchdog timer;

Sensor data recording (SDR) and FRU information reading;

Event messages, platform events;

Chassis control (power on, power off, reset).

In addition, ADLINK defines several OEM extension commands (NetFn=30h), including:

OemShowRevision (12h): Returns firmware version, product ID, etc.

OemRescanGalinput (22h): Rescan the geographic address and update the IPMB address.

OemReportGeoAddress (F0h): Reports the IPMB address and GA pin status.

OemEnable Smbus (F2h)/OemDisable Smbus (F3h): Enable/disable I2C bus access.

OemResetHost (F5h), OemPowerOff (F6h), OemPowerOn (F7h): Remote reset/power-off/power on control.

These commands can be sent through IPMI tools or serial CLI, making them suitable for remote maintenance.

Geographic address mapping: The board automatically generates IPMB addresses (0xB0~0xEE) based on the GA [4:0] pins of the backplane, and multiple master systems can coexist.

Sensor List:

BMC Watchdog, 3.3V, 5V, CPU temperature, system temperature (B2 and earlier versions); Add a 12V voltage sensor for B3 and beyond.

Serial Console redirection

Through the Console redirection function in BIOS, POST information and system commands can be output to the serial port, enabling remote debugging without a display. Usage:

Enable Console redirection in BIOS and set the baud rate (consistent with the client, recommended 115200).

Connect the server COM port to the client COM port using a null modem cable.

Run HyperTerminal or similar terminal software on the client, configure the same baud rate, 8 data bits, 1 stop bit, no checksum, ANSI/VT100 simulation.

Turn on the server power, and POST information will be displayed in real-time on the client.

After entering the operating system, command line operations can still be executed through this serial port (with OS support).

Note: Some function keys (such as DEL, ESC, directional keys) require escape sequences (see manual appendix), for example, ESC [1~represents HOME.

Common troubleshooting and maintenance suggestions

Possible causes and solutions for the fault phenomenon

No display on power, CPU not installed or heat sink not properly attached. Check the CPU locking screws and heat sink installation

Hot swappable blue light abnormal backplane ENOM # not connected correctly. Confirm that the backplane supports PICMG 2.1 and ENOM # is enabled in BIOS

Check if all SWY/SWZ on RTM are turned on (rear) or off (backplane) due to incorrect setting of the rear gigabit routing switch

CF card cannot recognize master-slave conflicts. Adjust the Master/Slave bit of SWY5 to ensure no duplication

IPMI cannot communicate. Serial port mode is not set to IPMI. Switch SWZ2 to IPMI mode (3-ON, 4-ON)

Watchdog does not trigger reset. GPO57 is not pulled low or WDT is not enabled. Check GPOBASE+38H bit57=0 and confirm that Watchdog is enabled in BIOS

System overheating, shutdown, poor air duct or fan failure guarantee 30 CFM forced air cooling, check the installation of heat sinks

BIOS settings cannot save CMOS battery failure, replace onboard battery (pay attention to anti-static)

Power consumption reference (based on test data):

ULV 1.66 GHz idle: approximately 24.5W（ 5V@3.9A  +  3.3V@1.5A ）

LV 2.0 GHz full load: approximately 48.5W（ 5V@8.7A  +  3.3V@1.55A ）

The actual power consumption is related to the load and peripherals, and there should be margin in the power supply design.