Beckhoff CX8110 Embedded PC

6.3 Creating Process Data (Pay Attention to Alignment)

Due to the alignment requirements of Arm processors, when creating input/output variables:

Create a data structure using Create Array Type and check if SIZEOF matches expectations.

If the length of the structure is different on x86 and Arm, dummy bytes should be added to force alignment.

6.4 Creating a PLC Project

Add a standard PLC project, write a simple program and build it. Then associate PLC variables with hardware I/O through Attach Variables. Finally, click on Activate Configuration and switch TwinCAT to Run mode.

6.5 Explicit Device Identification (DIP Switch) Settings

Click on the EtherCAT slave (CX8110) in the TwinCAT tree view, and in the EtherCAT Slave tab:

Check 'Using Dipswitch Value'

Alternatively, cancel this option and enter a numerical value directly in the Value field below (overriding DIP switches).

Distributed Clock (DC) Configuration

CX8110 supports distributed clocks and can be used as a slave to synchronize with the upper level master. Configuration is divided into two steps:

7.1 Enable DC on CX8110 (slave) side

Click on the EtherCAT slave of CX8110 in TwinCAT.

Check Enable Synchronization in the EtherCAT Slave tab.

After confirmation, DcToTcTimeOffset, DcTimeDiff, and DcState variables will appear under InfoData.

Click on the EtherCAT master (lower level master) of CX8110 and enable DC Time controlled by CCAT Time (Master Mode) in EtherCAT → Advanced Settings.

7.2 Configuring DC on the upper master station side

Connect CX8110 to the upper level master station (such as another Beckhoff controller).

Scan CX8110 in the TwinCAT project on the main site.

Click on the CX8110 slave station, switch to the DC tab, and select DC Synchron.

Ensure that the synchronization task cycle is ≤ 5 ms and the CPU load is below 60%. The best synchronization effect can be achieved with a period of 1-2 ms.

Diagnostic variables:

DcTimeDiff (DINT): master-slave clock deviation, in ns. Under a task cycle of 1 ms, a deviation of<10 ns is optimal, and<100 ns is acceptable.

DcState: A value of 0x_2 indicates that TwinCAT time is controlled by CCAT time.

Note: If only K-bus terminals (non EtherCAT) are used, the distributed clock function has no practical significance.

1-second UPS and persistent variable protection

The CX8110 is equipped with a capacitive 1-second UPS, which can provide brief power to the CPU after the main power supply is cut off, to save persistent variables (PERSISTENT) to the microSD card. The maximum amount of data that can be reliably saved throughout the entire lifespan is 1 MB.

8.1 Working principle and configuration

Declare the variable that needs to be retained during power outage as VAR PERSISTENT in the PLC.

Loop the function block FB_S-UPS_CX81xx (located in the Tc_2SUPS library) in the fastest task.

Set eUpsMod:

ESUPs_WrPersistData_Shutdown (default): Automatically shuts down quickly after saving data

ESUPs_WrPersistData_CoShutdown: Only saves data, does not shut down

ESUP_SimediateShutdown: Immediately shut down (without saving data)

ESUPS-CheckPowerStatus: Only detects power status

Persistent data is saved in WinCAT 3.1 Boot Port_85x.bootdata. When the system starts, the file will be loaded and a backup *. bootdata old will be created.

8.2 Precautions

Only TwinCAT can control the 1-second UPS, and other applications must not interfere.

1 second UPS does not supply power to K-bus/E-bus, so bus data may become invalid after UPS activation.

After power failure detection, other application logic should be stopped from being called:

iecst

IF NOT FB_S_UPS_CX81xx.bPowerFailDetect THEN

//Normal procedure

END_IF

If persistent data loading fails (backup is being used), it can be determined through PlcAppSystemInfo. OldBootData (True indicates backup is being used). To force the deletion of invalid backups, you can set the registry:

[HKEY_LOCAL_MACHINESOFTWAREBeckhoffTwinCATPLC] "ClearInvalidPersistentData"=dword:00000001

Or check Clear Invalid Persistent Data in TwinCAT.

8.3 Real time clock (RTC) slow running problem

If the system time of CX8110 is found to be slow, the reason is that the TwinCAT real-time driver failed to update the operating system clock in a timely manner under high load or long cycle tasks. Solution: Modify the registry

[HKEY_LOCAL_MACHINEPlatform] "SoftRTC"=dword:0

Force hardware RTC to be read every time Windows time is requested (which will increase slight CPU load).

Diagnosis and troubleshooting

9.1 Overview of LED indicator lights

Meaning of LED color/status

TC Green TwinCAT Run Mode

TC Red TwinCAT Stop Mode

TC Blue TwinCAT Config Mode

EC RUN green constant light EtherCAT OP status

EC RUN green flashing (200ms) PRE-OP status

EC RUN green flashing (200ms on/1000ms off) SAFE-OP status

EC ERR red constant light EtherCAT not configured or incorrect

K-BUS ERR flashing red K-bus error (see below)

9.2 K-bus Error Diagnosis

When the red K-BUS ERR LED flashes in a specific sequence, the fault can be located by counting the flash (start flag), slow flash count (error code), and second slow flash count (error parameter):

Error code parameter description and solution