ADLINK PCI-9118 series high-speed DAQ card selection and DMA configuration

ADLINK PCI-9118 series high-speed DAQ card selection and DMA configuration

Introduction: Performance bottlenecks and breakthroughs in high-speed data acquisition

In automated testing, vibration analysis, power monitoring, and high-speed process control, the sampling rate, resolution, and data transmission capability of the data acquisition card directly determine the overall performance of the system. Traditional PCI acquisition cards often suffer from data loss due to interrupt response delay or FIFO overflow, especially in Windows non real time operating systems, where high-speed continuous acquisition faces severe challenges. The ADLINK PCI-9118 series achieves seamless data flow of up to 333kS/s by introducing bus master DMA, programmable channel gain queue, and 1k sample FIFO, while providing 12 bit or 16 bit resolution options to meet different accuracy requirements. This article will systematically analyze the selection points, hardware configuration, DMA transfer mechanism, and analog output applications of PCI-9118DG (12 bit/333kS/s), PCI-9118HG (high gain version), and PCI-9118HR (16 bit/100kS/s), helping engineers make optimal decisions in high-speed acquisition projects.

Model comparison and selection decision

The PCI-9118 series includes three models, with the following core differences:

Model A/D Resolution Maximum Sampling Rate Gain Options Input Range Applicable Scenarios

PCI-9118DG 12 bit 333 kS/s x1, x2, x4, x8 bipolar ± 5V~± 0.625V; unipolar 0~10V~1.25V universal high-speed acquisition, such as vibration, audio, transient signals

PCI-9118HG 12 bit 333 kS/s x1, x10, x100 bipolar ± 5V~± 0.05V; single pole 0~10V~0.1V weak signal detection, such as thermocouples, strain gauges, sensors

PCI-9118HR 16 bit 100 kS/s x1, x2, x4, x8 with DG high-precision slow signal, such as temperature, pressure, DC measurement

Selection key:

If the application requires high dynamic range and large signal amplitude changes (such as accelerometers), the DG version provides 12 bit resolution at 333kS/s, with outstanding cost-effectiveness.

If you need to measure millivolt level signals (such as K-type thermocouples), the HG version provides x100 gain, can resolve 0.05V full-scale, and with 12 bit resolution, the theoretical minimum resolution is about 24 μ V (0.05V/4096), which meets the needs of most industrial sensors.

If high DC accuracy is required (such as load cell output), the HR version sacrifices speed for accuracy at a 16 bit resolution (1/65536), making it suitable for precise measurement of slowly changing signals.

Analog input architecture: channel gain queue and automatic scanning

3.1 Flexible configuration of channels and gains

The PCI-9118 series offers 16 single ended or 8-differential inputs (selected through software). The core highlight is the 256 level channel gain queue, which allows users to pre define up to 256 "(channel, gain)" combinations. During the scanning process, the A/D converter samples sequentially in queue order, and each sampling point can have an independent gain setting without the need to repeatedly switch registers in the software. For example, the queue can be set to channel 0 gain 1, channel 1 gain 10, channel 0 gain 1, channel 2 gain 100... to adapt to signal sources of different amplitudes in the same round of scanning, greatly improving the flexibility and sampling efficiency of multi-sensor systems.

3.2 Input Range and Polarity

The DG/HR version supports bipolar (± 5V, ± 2.5V, ± 1.25V, ± 0.625V) and unipolar (0~10V, 0~5V, 0~2.5V, 0~1.25V) modes; The HG version provides bipolar ± 5V, ± 0.5V, ± 0.05V and unipolar 0-10V, 0-1V, 0-0.1V. The input impedance is as high as 1G Ω, with almost no signal source loaded; Overvoltage protection ± 35V continuous, can protect the card from damage in case of wiring errors.

Engineering tip: Try to choose gain levels that are close to 80% or higher of the signal's full range to utilize full resolution. For example, in the DG version, using x4 gain (± 1.25V range) for ± 1V signal is better than x2 (± 2.5V range).

Trigger mode and sampling control

PCI-9118 supports three types of trigger sources to meet different synchronization requirements:

Software trigger: Start a single conversion by writing a trigger register. Suitable for manual testing or low-frequency polling.

Timer trigger (Pacer): The internal 8254 counter generates precise pulses to drive the A/D to continuously sample at a fixed rate. The maximum frequency is limited by the upper limit of the sampling rate.

External trigger (EXTTRG, TTL compatible): Sampling is initiated through external digital signals (such as rotary encoder Z-pulses, optical gates) to achieve synchronization with external events. Can be used in the "waiting for trigger" mode, especially suitable for event driven data collection in process control.

All triggering modes can be combined with automatic scanning and DMA transfer to achieve high-speed background data collection without human intervention.

Data transfer: FIFO and bus master DMA

5.1 Onboard FIFO Buffer

PCI-9118 is equipped with a 1k sample FIFO for temporarily storing converted data. At a rate of 333 kS/s, FIFO can buffer approximately 3 ms of data, providing a time window for software response.

5.2 Three data reading methods

Polling: Software loops to check the FIFO status and read data, suitable for low-speed or simple applications, but with high CPU usage.

Interrupt: When the FIFO is half full or a single conversion is completed, an interrupt is triggered and the ISR reads the data. More efficient than polling, but the interrupt frequency may be too high at high rates.

Bus Master DMA (recommended): PCI-9118 adopts Bus Master DMA, and data is directly written into the host memory through the PCI bus without CPU intervention. With the design of "seamless continuous transmission", even under the Windows operating system, it can ensure long-term high-speed data collection without losing points. DMA mode is particularly suitable for applications that require continuous recording of large amounts of data, such as recording vibration signals for several hours.

DMA activation steps:

Configure channel gain queue.

Set the sampling rate (triggered by Pacer).

Allocate user memory buffer and initiate DMA transfer.

The software only needs to wait for DMA completion or use circular buffering to distinguish batch reads.

Analog Output (DAC)

PCI-9118 provides 2-channel 12 bit analog output with a fixed output range of ± 10V, a driving capability of ± 5mA, and a setup time of 4.5 μ s to 0.5LSB. Can be used for outputting control signals, waveform generation, or as an excitation source. The output is directly written to the DAC register through programming I/O, without the need for DMA.

Application scenario: Output control voltage drives proportional valves in closed-loop control; Or output analog signals in sensor simulation.

Digital I/O and Timer

TTL digital I/O: 4-channel input and 4-channel output, compatible with 5V/TTL, used for simple status monitoring or control (such as reading trigger signals, lighting LEDs).

External trigger input (EXTTRG) and trigger output (TGOUT) * *: are respectively the external trigger source input and the acquisition start indication output, which can be used for synchronization with other devices.

Software support and driver ecosystem

The PCI-9118 series provides comprehensive driver support:

PCIS-DASK (Windows 2000/NT/XP/9x): Includes DLL and sample code, supports VB/VC+/Delphi/BCB.

PCIS-DASK/X (Red Hat Linux): Shared library, supports GNU C/C++.

LabVIEW: Provides VI through PCIS-LVIEW/PnP and seamlessly integrates with NI LabVIEW.

ActiveX Control (PCIS-OCX): Suitable for rapid development.

DAQBench: Provides advanced analysis controls.

Development suggestion: For continuous high-speed data acquisition, prioritize using DMA API (such as _9118A_DMA_Start) and cooperate with double buffer loop reading to ensure that data is not lost.

Typical application cases

Case 1: Vibration Monitoring of Rotating Machinery

Use PCI-9118DG to collect 4-channel accelerometer signals at a sampling rate of 333kS/s, with a gain of x2 (± 2.5V) for each channel. Using DMA to directly write data streams to the hard drive, achieving continuous 24-hour monitoring. Connect the external trigger signal to the key phase sensor to achieve order tracking.

Case 2: Multi type sensor data acquisition

In a test bench, simultaneously connect thermocouples (± 10mV), pressure sensors (0-5V), and displacement sensors (± 10V). Using a 256 level channel gain queue, set HG version gain to 100 and DG version gain to 1 and 2 respectively. All signals can be obtained in a single scan without switching gains.

Case 3: High precision DC measurement

Use PCI-9118HR to collect 16 bit resolution bridge weighing sensor output (0-10V) at a sampling rate of 100kS/s. Single pole mode with x1 gain is used to achieve microvolt level resolution for accurate recording of force values in material testing machines.

Calibration and Accuracy Verification

The calibration of PCI-9118 is carried out through a software utility tool (such as 9118Cal), which requires an external high-precision voltage source and a multimeter. Mainly adjust A/D offset and gain error. The accuracy given in the specification sheet (such as 0.008% FSR ± 1LSB) is a typical factory value, and it is recommended to calibrate it once a year to maintain performance.

Simple self-test: Connect AGND at the channel input and read data close to 0 (bipolar) or midpoint of range (unipolar). If the deviation is too large, software offset compensation can be performed.

Common troubleshooting

A/D data is all zero or saturated: check whether the channel gain queue configuration is correct and whether the input signal exceeds the range; Confirm that the trigger source has been started (software triggering requires calling a function).

DMA transfer failed: Confirm that PCI-9118 has been inserted into the PCI slot that supports bus master control (some old motherboards require driver updates); Is the allocated memory buffer page aligned; Check the completion status of DMA transfer.

The sampling rate cannot reach the nominal value: confirm that the timer frequency division setting is correct and the external trigger frequency has not exceeded the limit; Other high load tasks on the Windows system may affect DMA response and can increase process priority.

Analog output without voltage: Check if the DAC register is written correctly and if the output load is short circuited; Reset the card and reinitialize.