ADLINK 723X Isolation I/O Card Configuration Guide

CPCI-7230/LPCI-7230/LPCIe-7230: Using a 50 pin SCSI-II connector, in addition to the above signals, it adds IDI'nH/IDI_nL differential input pairs (for channels 8-15), supports differential mode to suppress common mode noise, and provides an additional ISO5V isolated power output (5V, which can supply power to external sensors).

PCI-7233: DB-37 interface, only includes IDI0~IDI-31 and I.GND (isolated common ground), without output related pins. Its dual interrupt sources correspond to COS events with low 16 bits (IDI_~15) and high 16 bits (IDI_ 16~31), respectively.

PCI-7234/7234P: DB-37 interface, only includes IDO0~IDO-31, I.GND, and VDD, without input channels. Note that 7234P is the source current output, and the external load needs to be connected between the output pin and ground, while 7234 is the sink current, and the load is connected between VDD and the output pin.

When actual wiring, it is necessary to use matching terminal blocks (such as ACLD-9137-01, DIN-37D-01 or DIN-50S-01) to simplify on-site wiring and provide reliable connection protection.

Register level programming and I/O control

Understanding register mapping is crucial for applications that require direct low-level control. All 723X series cards occupy a 32-bit base address in the I/O space (allocated by BIOS and can be obtained by reading the PCI configuration space offset of 18h). 32-bit (WORD) access must be used, 8-bit or 16 bit operations are prohibited, otherwise bus errors may occur.

4.1 Digital Input Register (Read Only)

The base addresses+0~+3 correspond to bytes 0~3, and each bit corresponds to an isolated input.

For the 7230 series: only use+0 and+1 (corresponding to IDI_1~IDI_15).

For 7233: Use+0~+3 (corresponding to IDI0~IDI-31).

Reading this register will obtain the current logic state of all input channels (1=high level, 0=low level).

4.2 Digital Output Register (Write Only)

Same base address+0~+3, each bit controls one isolated output.

The 7230 series uses+0 and+1 (IDO0~IDO-15).

7234/7234P uses+0~+3 (IDO0~IDO-31).

Writing 1 causes the corresponding output to conduct (for the sink current type, the output transistor is pulled low; for the source current type, the output transistor is pulled high to VDD).

When programming, it is important to note that the output register is write only and cannot read back the current output state. Therefore, the software needs to maintain a copy of the output image on its own.

4.3 Interrupt and COS detection (PCI-7233 only)

The unique advantage of PCI-7233 lies in its dual interrupt system, which allows edge change monitoring of 32 input channels. The internal hardware generates INT1 from the COS signal of the low 16 channels and INT2 from the high 16 channels. These two interrupts share the same IRQ line (allocated by BIOS), but their sources can be distinguished in ISR through status registers.

COS detection principle: The rising and falling edges of each input channel are captured. Once a jump occurs, the corresponding interrupt request is latched until the software call clears the interrupt function (such as _7233_CLR-IRQ) before being released. This mechanism is very suitable for scenarios that require immediate response to changes in switch values, such as emergency stop signals, safety door status, flow meter pulses, etc., without the need for continuous CPU polling, significantly reducing system overhead.

Detailed explanation of isolated input-output circuits and external wiring specifications

5.1 Input Circuit

The input terminals of 7230 and 7233 use optocouplers, with 1.2k Ω current limiting resistors connected in series internally. External signals can be connected in a "common ground" or "common source" manner, depending on the EICOM pin connection:

Common ground mode: EICOM is connected to the external power supply ground, and the input signal is connected to IDI-n. When the signal is high (5~24V), the optocoupler conducts and the input register reads logic 1.

Common source mode: EICOM is connected to the positive pole of an external power supply. When the input signal is pulled down to ground by an external switch, the optocoupler conducts.

For the differential channel (IDI_nH/IDI_nL) of cPCI-7230/LPCI-7230/LPCIe-7230, it is more suitable for long-distance transmission or high noise environments, effectively suppressing common mode interference.

5.2 Output Circuit

The output terminal is a Darlington transistor. When the output is logic 1, the internal transistor of the current sink type (7230/7234) conducts, pulling the output pin to EOGND (i.e. low level), and the load current flows from VDD through the load into the pin. The source current type (7234P) is the opposite. When logic 1 is applied, the pin outputs a high level (close to VDD), and the current flows from the pin through the load to the external ground.

In addition to providing load current, the VDD pin is also internally connected to a freewheeling diode (flywheel diode). When driving inductive loads such as relay coils and solenoid valves, this diode provides a discharge circuit for the reverse induced electromotive force at the moment of turn off, protecting the output transistor from breakdown. It is necessary to provide an external power supply of 5-35V for VDD, and the common ground of the power supply must be connected to EOGND (sink current type) or to the external load ground (source current type).