How to operate GE VMIVME-2511 programmable I/O board?

How to operate GE VMIVME-2511 programmable I/O board?

Product Overview

Basic introduction: VMIVME-2511 is a programmable I/O board compatible with VMEbus. It uses two Motorola MC68230 parallel interface/timer chips and one Motorola MC68153 bus interrupt module, with multiple functions and features.

Key Features

48 bit I/O (including bit I/O, unidirectional 8-bit and 16 bit, bidirectional 8-bit and 16 bit).

Interrupt generation logic, supporting four interrupt sources, each MC68230 has one timer interrupt and one port interrupt.

Optional high current driver with a current filling capacity of up to 64mA.

Two 24 bit programmable timers, supporting software programmable timer mode.

Optional handshake timer that can be connected to various low-speed, medium speed, or high-speed peripherals or other computer systems.

Equipped with Centronics parallel interface.

Physical description and specifications

Physical description: Composed of VMEbus compatible logic, interrupt control logic, and I/O control logic related to parallel interface/timer modules. VMEbus compatible logic includes address decoding logic and data transmission control logic, supporting VMEbus read and write data transmission; The interrupt control logic utilizes Motorola MC68153 BIM to allow port and timer interrupts from each parallel interface/timer; The parallel I/O port is programmable and supports multiple modes. The high current driver option can provide up to 64mA of surge current capability, but does not support bidirectional mode. If the bit I/O mode is selected, all A port data bits must be programmed in the same direction.

Features

Compatibility: Complies with VMEbus specifications and adopts dual height external dimensions.

I/O connector type: 64 pin connector (DIN 41612).

I/O organization: Utilizing two Motorola MC68230 parallel interfaces/timers, providing multiple programmable I/O functions, buffered I/O options have driver capability limitations and do not support bidirectional mode.

Addressing scheme: An 8-bit DIP switch provides board address, and the factory default configuration is to respond to short monitoring I/O access. Users can change it to short non privileged I/O access through jumper wires.

Data polarity: can be ordered as high or low validity.

Electrical specifications: Provide parameters such as output high voltage, output low voltage, input high voltage, input low voltage, output high current, and output low current for both without and with I/O buffer.

Physical specifications

Environment: Operating temperature from 0 to 55 ° C, storage temperature from -20 to 85 ° C; relative humidity from 20% to 80%, no condensation; The cooling method is convective cooling.

Power requirement:+5V, maximum 2.5A.

Ordering information: The ordering model of VMIVME-2511 includes multiple options, including key, output options, input options, data transmission, I/O options, output resistance options, input voltage, output type, input type, etc. The input and output polarity options must be the same, and compatible connectors, strain eliminators, and PC board connectors are also provided.

Operating principle

Block diagram: VMIVME-2511 consists of 10 main subsystems, each with a detailed block diagram, including address decoding subsystem, parallel interface/timer and I/O port control logic, VMEbus interrupt subsystem, etc.

Operation Overview: Two MC68230 modules are respectively associated with P3 and P4 connectors. I/O data transmission is achieved by selecting registers on the required P/I/T modules, interrupt processing is implemented by programming the selected P/I/T modules, and the corresponding channels in 68153 BIM are enabled to enable specific interrupt sources to be responded to by the system processor. Some jumper selections vary depending on the port channel function of the P/I/T module.

I/O data transfer description: I/O transfer is performed through P3 and P4 connectors, with the help of port registers on the required P/I/T module. When equipped with optional buffers, I/O operations are a subset of the P/I/T module functionality, which limits programmability but enhances driving capability.

Interrupt capability: capable of handling four interrupt requests, with each P/I/T module supporting two requests (port interrupt request and timer interrupt request)