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  • GE DS200TCCBG8B Common Extended Analog I/O Board
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  • GE DS200TCCBG8B Common Extended Analog I/O Board

    110V-380V
    5W-130W
    1A-30A
    1 year
    30
    United States, France, Japan, Viet Nam, Australia, Russia, Germany, Italy, Arabia

    GE DS200TCCBG8B Common Extended Analog I/O Board

    • ¥22000.00
      ¥24520.00
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    Weight:2.500KG
    • Quantity:
    • (Inventory: 33)
Description

GE DS200TCCBG8B Common Extended Analog I/O Board


GE DS200TCCBG8B Common Extended Analog I/O Board

Part Number DS200TCCBG8B Manufacturer General Electric Country of Manufacture As Per GE Manufacturing Policy Series Mark V Function Module Availability In StockDS200TCCBG8B is a Common Extended Analog I/O Board manufactured and designed by General Electric as part of the Mark V Series used in LM turbine control systems. The Common Extended Analog I/O Board (TCCB) scales and conditions additional analog I/O signals that are read from the TCEB board in the P1 core and the TBCB terminal board installed on the R5 core. 

These signals consist of the line current inputs, RTDs, generator and bus voltage inputs, and 420 mA/01 mA inputs. Through the 3PL connector, the STCA board gets the scaled and conditioned signals. TCCB CONNECTORS ARE AS FOLLOWS: 2PL - Distributes power from the TCPS board in the core. 3PL - The Data Bus between the STCA, TCCA, and TCCB boards in core . Conditioned signals are carried on 3PL for transferring to the COREBUS. JHH - Carries the 4-20 mA/0-1 mA input signals from the TBCB terminal board. JII - Carries the RTD input signals from the TBCB terminal board. JMP - Carries the potential and current transformer (PT and CT) signals from the TCEB board in the core. 

 TCCB CONFIGURATION FOR HARDWARE & SOFTWARE: HARDWARE: The Mark V LM's generator and bus voltage monitoring functions, as well as the line current monitoring function, are provided by the hardware jumpers J1, J2, J3, J4, and J5. The RS232 serial port is linked to DCOM through hardware jumper J14. J15 and J16 are hardware jumpers that are used for testing. For details on the hardware jumper settings for this board, consult Appendix A and the operator interface's hardware jumper screen. SOFTWARE: I/O configuration constants are entered in the I/O Configuration Editor located on the HMI as explained below for the RTDs, mA inputs, generator, bus voltage, and line current settings. 

 TCCB 4-20 mA INPUT CIRCUIT: The circuitry for the 420 mA and 01 mA input signals is provided by the TCCB board. The JHH connector is used to read the signals from the TBCB terminal board. The voltage drop is measured by the TCCB board and written to the I/O Engine via the 3PL connector as the transducer current is reduced across a burden resistor. The current range of the input signals is chosen using hardware jumpers on the TBCB terminal board. TCCB GENERATOR/BUS VOLTAGE & CURRENT INPUT CIRCUITS: The TCCB board scales and conditions the voltage signals from the generator, bus, and line, as well as the current signals from the line (PT and CT). The TCCB calculates the generator megawatt, power factor, and VARs utilized for power system monitoring using these signals, which are used to determine the phase currents and voltages. These signals are read from the PTBA terminal board, scaled in the P1 core of the TCEB board, and then written to the TCCB board using the JMP connector.

OTHER INFORMATION

• Celeron™ socket 370-based single-board computer (SBC) with operating  system support for Windows NT®/Windows® 2000, Linux, VxWorks, QNX,  and Solaris 

• Special features for embedded applications 

— Up to 512 Mbyte IDE CompactFlash (optional) 

— Three programmable 16-bit timers 

— 32 Kbyte of battery-backed SRAM 

— Remote Ethernet booting supported 

— Software-selectable watchdog timer with reset 

— Supports VMEbus P2 connection to HD/floppy drive 

— PMC expansion site with VMEbus P2 I/O 

— PC•MIP expansion site supported 

— VME64 modes supported: A32/A24/D32/D16/D08(EO)/MBLT64/BLT32 

— VMEbus interrupt handler, interrupter, and system controller 

— Includes byte-swapping hardware for little-endian and big-endian data  interfacing (patent no. 6,032,212) 

— Enhanced bus error handling 

— Passive heat sink design (no moving parts) 

• Standard features include 

— Celeron socket 370 processor 

— Up to 256 Mbyte SDRAM using one 144-pin SODIMM 

— 64-bit Intel® AGP SVGA controller with 2 Mbyte SGRAM 

— On-board Fast Ethernet controller supporting 10BaseT and 100BaseTX  interfaces 

— On-board Ultra DMA/33 hard drive and floppy drive controllers with  VMEbus P2 I/O 

— Two high-performance 16550-compatible serial ports 

— PS/2-style keyboard and mouse port on front panel 

— Real-time clock and miniature speaker included


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