For external analog trigger inputs (EXTATRIG, SRC1), the level range is ± 10V and the resolution is 78mV (Table 4-7). When selecting the ADC input channel as the trigger source (SRC2), the trigger resolution is equal to the full-scale range divided by 256. For example, the resolution at ± 10V range is 78.125mV.
6.2 External digital triggering
EXTDTRIG (A/D dedicated) and EXTWFTRIG (D/A dedicated) accept TTL level signals, with a minimum pulse width of 20ns and programmable selection of rising or falling edge triggering.
SSI Multi Card Synchronization: Breaking the Channel Limit
When more than 4 synchronization channels are required (such as 8-channel vibration analysis), multiple DAQ-20xx cards can be cascaded through the system synchronization interface (SSI). SSI implements daisy chain connection using 20 pin flat cable (ACL-SSI) in the PCI version; In the PXI version, signal routing is completed through the PXI trigger bus (J2) without the need for additional cables.
Six core timing signals that can be synchronized (Table 3-5):
SSI_TIMEBASE (Time Base Clock)
SSIOADCONV (A/D conversion signal)
SSI_SCAN-START (scan start)
SSI_AD_TRIG (A/D triggered)
SSI-DAWR (D/A update)
SSI_CA_TRIG (D/A triggered)
Example of master-slave configuration (4-card synchronization):
Set card 1 as the master device for ADCONV signals, and cards 2-4 as slave devices.
Card 1 receives external digital triggers and initiates data collection, generating ADCONV signals internally.
Card 1 broadcasts ADCONV signals to cards 2-4 through SSI.
Simultaneously convert four cards to achieve 16 channel synchronous sampling.
Important constraint: Each timing signal can independently select a master device, that is, card 1 can be used as the TIMEBASE master device, and card 2 can be used as the AD_TRIG master device. After power on or reset, the timing signals generated internally by each card are used by default.
D/A waveform generation and iterative output
Two 12 bit D/A outputs (LTC7545) support a maximum update rate of 1MS/s and are equipped with a 2K sample FIFO. The waveform generation involves 5 counters (UI_comounter, UC_comounter, IC_comounter, DA-DLY1_counter, DA-DLY2-Counter), which can generate the following patterns:
Post trigger waveform: output immediately after triggering (Figure 4-15).
Delay trigger waveform: After triggering, it is delayed by DLY1 and then output (Figure 4-16).
Repetitive trigger generation: Output a waveform once per trigger, ignoring new triggers during the output process (Figure 4-17).
Iterative waveform: IC_comounter sets the number of repetitions and supports finite (Figure 4-18) or infinite (Figure 4-19) repetitions.
DLY2 Delay: The interval between two consecutive waveform generations (labeled in Figure 4-19).
Stop mode (when triggered by software stop):
Mode I: Stop immediately.
Mode II: Stop after completing the current single waveform.
Mode III: Stop after completing integer multiples of IC_comounter waveform (Figure 4-20~4-22).
GPTC universal timer/counter with eight working modes
Two 16 bit timers/counters (GPTC0/1) support up to 10MHz external clock input and provide 8 programmable modes (Figure 4-23~4-30):
Typical Applications of Mode Function Description
1 Simple Gate Control Event Counting Pulse Counting
2 Single cycle measurement frequency measurement
Analysis of PWM duty cycle for 3 single pulse width measurements
4 Single Gate Control Pulse Generation Programmable Delay Single Pulse
5 single trigger pulses generate external edge triggered single pulses
Generate a single pulse with 6 triggers to trigger each external edge pulse
7 single trigger continuous pulse generation triggers continuous output pulse train
8 consecutive gate control pulses generate continuous pulses during gate control enable period
All modes are software started, with initial values that can be loaded and current count values that can be read back at any time without affecting counting operations.
Calibration and maintenance
The DAQ-20xx series supports automatic calibration without the need for external signal sources or measuring instruments. The onboard 5.000V reference source (temperature drift ± 2ppm/℃, long-term stability 6ppm/1000Hr) ensures calibration accuracy.
Operation process:
Preheat for at least 15 minutes after power on (stability requirements in the manual).
Disconnect all I/O cables (D/A output may change during calibration).
Perform automatic calibration (via software driven API).
Save the new calibration constant to one of the three user modifiable areas in the EEPROM (while recording the calibration date and ambient temperature).
The default factory calibration constant is saved in a separate area, and users can restore the factory values at any time.
