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ADLINK PCI-9118 series high-speed DAQ card selection and DMA configuration

F: | Au:FANS | DA:2026-08-06 | 550 Br: | 🔊 点击朗读正文 ❚❚ ▶ | Share:

5.2 Three data reading methods

Polling: Software loops to check the FIFO status and read data, suitable for low-speed or simple applications, but with high CPU usage.

Interrupt: When the FIFO is half full or a single conversion is completed, an interrupt is triggered and the ISR reads the data. More efficient than polling, but the interrupt frequency may be too high at high rates.

Bus Master DMA (recommended): PCI-9118 adopts Bus Master DMA, and data is directly written into the host memory through the PCI bus without CPU intervention. With the design of "seamless continuous transmission", even under the Windows operating system, it can ensure long-term high-speed data collection without losing points. DMA mode is particularly suitable for applications that require continuous recording of large amounts of data, such as recording vibration signals for several hours.

DMA activation steps:

Configure channel gain queue.

Set the sampling rate (triggered by Pacer).

Allocate user memory buffer and initiate DMA transfer.

The software only needs to wait for DMA completion or use circular buffering to distinguish batch reads.


Analog Output (DAC)

PCI-9118 provides 2-channel 12 bit analog output with a fixed output range of ± 10V, a driving capability of ± 5mA, and a setup time of 4.5 μ s to 0.5LSB. Can be used for outputting control signals, waveform generation, or as an excitation source. The output is directly written to the DAC register through programming I/O, without the need for DMA.

Application scenario: Output control voltage drives proportional valves in closed-loop control; Or output analog signals in sensor simulation.


Digital I/O and Timer

TTL digital I/O: 4-channel input and 4-channel output, compatible with 5V/TTL, used for simple status monitoring or control (such as reading trigger signals, lighting LEDs).

External trigger input (EXTTRG) and trigger output (TGOUT) * *: are respectively the external trigger source input and the acquisition start indication output, which can be used for synchronization with other devices.


Software support and driver ecosystem

The PCI-9118 series provides comprehensive driver support:

PCIS-DASK (Windows 2000/NT/XP/9x): Includes DLL and sample code, supports VB/VC+/Delphi/BCB.

PCIS-DASK/X (Red Hat Linux): Shared library, supports GNU C/C++.

LabVIEW: Provides VI through PCIS-LVIEW/PnP and seamlessly integrates with NI LabVIEW.

ActiveX Control (PCIS-OCX): Suitable for rapid development.

DAQBench: Provides advanced analysis controls.

Development suggestion: For continuous high-speed data acquisition, prioritize using DMA API (such as _9118A_DMA_Start) and cooperate with double buffer loop reading to ensure that data is not lost.


Typical application cases

Case 1: Vibration Monitoring of Rotating Machinery

Use PCI-9118DG to collect 4-channel accelerometer signals at a sampling rate of 333kS/s, with a gain of x2 (± 2.5V) for each channel. Using DMA to directly write data streams to the hard drive, achieving continuous 24-hour monitoring. Connect the external trigger signal to the key phase sensor to achieve order tracking.

Case 2: Multi type sensor data acquisition

In a test bench, simultaneously connect thermocouples (± 10mV), pressure sensors (0-5V), and displacement sensors (± 10V). Using a 256 level channel gain queue, set HG version gain to 100 and DG version gain to 1 and 2 respectively. All signals can be obtained in a single scan without switching gains.

Case 3: High precision DC measurement

Use PCI-9118HR to collect 16 bit resolution bridge weighing sensor output (0-10V) at a sampling rate of 100kS/s. Single pole mode with x1 gain is used to achieve microvolt level resolution for accurate recording of force values in material testing machines.


Calibration and Accuracy Verification

The calibration of PCI-9118 is carried out through a software utility tool (such as 9118Cal), which requires an external high-precision voltage source and a multimeter. Mainly adjust A/D offset and gain error. The accuracy given in the specification sheet (such as 0.008% FSR ± 1LSB) is a typical factory value, and it is recommended to calibrate it once a year to maintain performance.

Simple self-test: Connect AGND at the channel input and read data close to 0 (bipolar) or midpoint of range (unipolar). If the deviation is too large, software offset compensation can be performed.


Common troubleshooting

A/D data is all zero or saturated: check whether the channel gain queue configuration is correct and whether the input signal exceeds the range; Confirm that the trigger source has been started (software triggering requires calling a function).

DMA transfer failed: Confirm that PCI-9118 has been inserted into the PCI slot that supports bus master control (some old motherboards require driver updates); Is the allocated memory buffer page aligned; Check the completion status of DMA transfer.

The sampling rate cannot reach the nominal value: confirm that the timer frequency division setting is correct and the external trigger frequency has not exceeded the limit; Other high load tasks on the Windows system may affect DMA response and can increase process priority.

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