ADLINK DAQ-2500 Series Multi Channel Analog Output Card

ADLINK PXI/DAQ/DAQe-2500 series multi-channel analog output data acquisition card

Introduction: The core position of incentive sources in testing and measurement and the design philosophy of the 2500 series

In automated testing systems, data acquisition (DAQ) devices are typically divided into two functional domains: "measurement" and "excitation". Most DAQ cards emphasize high-precision analog inputs, while analog output channels are often used as auxiliary functions (usually only 2 channels). However, in sensor simulation, actuator driving, power management IC testing, and closed-loop control algorithm verification, a multi-channel, high update rate, and phase synchronized analog excitation source is precisely needed.

The Linghua PXI/DAQ/DAQe-2500 series is designed based on this requirement. Its most distinctive feature is that it takes multi-channel analog output as the primary performance indicator, providing 12 bit analog outputs of 4 channels (2501) or 8 channels (2502), each of which can independently achieve an update rate of 1 MS/s, and all channels can be updated simultaneously - this means that users can generate complex waveforms with multiple synchronized channels, such as three-phase sine waves, multiple PWM control signals, or custom arbitrary waveform sequences.

At the same time, the series did not neglect the data acquisition function, integrating 14 bit, 400 kS/s analog inputs (with 4 or 8 channels), combined with 24 digital I/O channels and dual channel 16 bit timers/counters, to form a complete "excitation response" measurement closed-loop platform. This article will present a comprehensive technical portrait to readers from the perspectives of hardware architecture, synchronization mechanism, software support, and actual deployment.

Analog output channel: core architecture and fine control

2.1 Output Channel Configuration and Model Differences

PXI/DAQ/DAQe-2501: Provides 4 analog outputs.

PXI/DAQ/DAQe-2502: Provides 8 analog outputs.

In addition to the number of channels, there is also a difference in the size of the D/A FIFO between the two: the 2501 board carries 8k sampling points, while the 2502 has 16k sampling points to accommodate the data buffering requirements when more channels are output simultaneously. The remaining analog output parameters are completely consistent.

2.2 Resolution and update rate

Resolution: 12 bits, no missing codes.

Maximum update rate: 1 MS/s (independent for each channel). This means that when 8 channels are output simultaneously, the total data throughput can reach 8 MS/s, which is sufficient to generate sine waves up to 500 kHz (satisfying the Nyquist sampling theorem).

Pendulum rate: 20 V/μ s, establishment time of 3 μ s to ± 0.5 LSB accuracy, ensuring fast transient response.

2.3 Output Range and Reference Source Flexibility

This series adopts the Multiplying DAC (MDAC) architecture, which not only supports the traditional fixed range output range, but also allows independent channel by channel programming:

Fixed range: 0~10 V (unipolar), ± 10 V (bipolar).

External reference range: 0~AOEXTREF (unipolar), ± AOEXTREF (bipolar), where AOEXTREF is the external reference voltage provided by the user (introduced through analog input pins).

This design is extremely advantageous for applications that require dynamic adjustment of output amplitude (such as temperature compensation of sensor excitation signal amplitude) or synchronization with external precision voltage references. Each channel can independently choose between internal or external references, and the polarity (single/double) can also be independently configured, greatly enhancing flexibility.

2.4 Hardware level arbitrary waveform generation (HWAWG)

This is one of the most eye-catching features of the series. Traditional waveform output relies on CPU or DMA to update the D/A register point by point, which can consume a large amount of system resources at high update rates. The 2500 series uses onboard D/A FIFO and hardware timing engine to transfer pre generated waveform data (length limited only by system memory) from host memory to FIFO through scatter aggregate DMA, and then output them one by one controlled by onboard clock. The CPU only needs to fill in initial data, and subsequent updates are automatically completed by hardware, thereby minimizing CPU load while ensuring uninterrupted waveform. This mechanism is crucial for generating long-term continuous signals, such as noise spectra and fatigue test sequences.

2.5 Trigger and synchronous output

Analog output supports software triggering, external digital/analog triggering, and SSI bus triggering. The triggering modes include post triggering, delayed triggering, and repeated triggering, which facilitate close synchronization with other instruments or tested devices.

2.6 Output driver and protection

Drive capability: ± 5 mA, supporting capacitive loads up to 1500 pF.

Stability: It can work stably under any passive load.

Offset error: Typical ± 8 mV (gain error ± 0.04% at full scale), accuracy indicators meet most industrial excitation requirements.

Analog input: The auxiliary measurement function should not be underestimated

Although analog output is the main feature, the 2500 series is still equipped with considerable analog input capability, making it easy for the system to simultaneously obtain response signals and achieve closed-loop or monitoring.

3.1 Number of Channels and Resolution

2501: 8-channel single ended input.

2502:4 channel single ended input.

Resolution: 14 bits, no missing codes.

Maximum sampling rate: 400 kS/s (shared by all channels, but can be multiplexed).

3.2 Input Range and Front End Characteristics

Bipolar: ± 10 V; Monopolar: 0~10 V (programmable).

Gain: Fixed at 1 (without programmable gain amplifier).

Input coupling: DC coupling.

-3 dB bandwidth: 600 kHz (± 10V range), sufficient to capture signal harmonics at a sampling rate of 400 kS/s.

Overvoltage protection: ± 30 V for power on, ± 15 V for power off, input impedance up to 1 G Ω//6 pF, with minimal impact on the tested circuit.

3.3 Trigger and FIFO

Analog input supports trigger modes similar to output, and is equipped with a 2k sampling point A/D FIFO on board. It supports scattering aggregation DMA to ensure that high-speed data streams do not lose points. This enables the 2500 series to synchronously collect response signals while outputting excitation signals, forming a complete frequency response analysis (FRA) or impedance measurement system.

Digital I/O and Timer/Counter

4.1 24 channel programmable DIO

Based on the 8255 compatible architecture, it is divided into three 8-bit ports and supports 5V TTL level. Input/output directions can be configured through software for controlling external relays, reading status indicators, or implementing simple handshake protocols. The data transmission method is program I/O, suitable for low-speed control tasks.

4.2 Dual channel 16 bit universal timer/counter

Reference clock: 40 MHz internal clock, while supporting up to 10 MHz external clock input.

Resolution: 16 bits.

Purpose: It can be used for pulse counting, frequency measurement, PWM generation, or as an additional sampling clock source, providing a flexible time reference for the system.

Bus interface and multi card synchronization mechanism

5.1 Three bus forms

DAQ-2500 series: 32-bit 3.3V/5V compatible with PCI bus, suitable for traditional industrial control computers.

DAQe-2500 series: PCI Express x1 interface, providing higher bandwidth and low latency, suitable for modern compact computers.

PXI-2500 series: Complies with PXI specification Rev 2.2, dimensions 160mm x 100mm, supports PXI backplane triggering and star triggering, suitable for chassis modular systems.

5.2 Multi card synchronization solution

When more channels are needed (such as 16 or 32 synchronous analog outputs), there are two ways to achieve this:

SSI (System Synchronization Interface) bus: Multiple cards are connected using dedicated cables (ACL-SSI-2/3/4) to achieve daisy chain or star distribution of clock and trigger signals, with synchronization deviation in nanoseconds.

PXI Trigger Bus (PXI models only): Utilizing backplane trigger lines to achieve multi module synchronization.

After synchronization, the analog output channels of all cards can be considered as a whole and updated simultaneously under the same startup signal, perfectly supporting applications such as multiphase motor drive and beamforming.

Automatic calibration and long-term stability

Onboard+5V high stability reference source (temperature drift ± 2 ppm/° C, long-term stability ± 6 ppm/1000 hours) combined with automatic calibration circuit, can perform gain and offset self calibration through software commands without the need for an external standard source. This greatly simplifies regular metering operations, ensuring that the equipment can maintain factory accuracy even after years of use.

Software Ecology and Development Support

7.1 Operating System Compatibility

Supports Windows 7/Vista/XP/2000/2003 Server and Linux, ensuring compatibility with mainstream development environments.

7.2 Drivers and Development Tools

D2K-DASK (Windows) and D2K-DASK/X (Linux): Low level driver libraries that provide rich APIs and support languages such as VB.net, VC.net, VB, VC++, BCB, Delphi, etc.

DAQPilot: LabVIEW specific driver that accelerates graphical programming.

DAQ-MTLB: MATLAB interface, convenient for researchers to quickly verify algorithms.

Upper level application software such as AD Loger and DAQBench support fast testing without programming.

Especially for arbitrary waveform generation, the driver library provides advanced functions. Users only need to input the waveform array and the number of repetitions, and the hardware can automatically complete the loop output.

Key points of attachment and system integration

8.1 Standard attachments

DIN-68S-01: 68 pin SCSI-II terminal board, supports DIN rail installation, convenient for on-site wiring.

ACL-10568-1:1 meter long 68 pin SCSI-VHDCI shielded cable (compatible with AMP 787082-7 connector), used for connecting terminal boards or directly to the device under test.

8.2 Precautions for External Reference and Trigger Connection

The manual specifically states that the external reference input (AOEXTREF) and the external analog trigger signal share analog input pins 5, 7, and 8. Therefore, when it is necessary to use both external references and external triggers simultaneously, it is important to carefully plan pin assignments to avoid conflicts. It is recommended to prioritize using PXI triggering or digital triggering to reduce the occupation of analog input channels.

8.3 Grounding and Isolation

Although the card does not provide inter channel isolation, its differential pseudo differential design (analog input is single ended) is sufficient for common ground systems with small ground potential differences. In noise sensitive environments, it is recommended to use shielded twisted pair cables and ensure that the signal source is well grounded with the acquisition card.

Selection Decision Matrix: Balance between 2501 and 2502

Reasons for recommending models for demand scenarios

Need to drive three-phase motor/inverter (3-channel sine+1-channel bias) 2501 (4-channel output), with 4 additional analog inputs available for current/voltage feedback

Multi channel sensor simulation is required (such as 6-degree-of-freedom platform, 8-channel piezoelectric actuator) with 2502 (8 outputs) and 8 synchronous outputs to meet the requirements of multi-channel excitation; Simultaneously use 4 inputs for monitoring

The system is based on the old PCI architecture DAQ-250x and is compatible with 5V/3.3V PCI

The system is a compact embedded controller (without PCI slot) with DAQe-250x PCIe interface, suitable for the new generation platform

Requires chassis style modular integration (such as combining with PXI digitizer and switch module) PXI-250x standard PXI size, with backplane synchronization

Replacement and upgrade considerations: For scenarios where other brands' 4/8 channel analog output cards are used, the 2500 series has significant advantages in channel count, update rate, and external reference flexibility. When migrating, it is important to focus on the connector pin definition (68 pin VHDCI) and software API differences, but the rich example code provided by Linghua can significantly shorten the development cycle.

Typical application scenarios and performance optimization suggestions

10.1 Application Examples

Automotive ECU testing: Simulate multiple signals such as oxygen sensors and crankshaft position sensors, while collecting ECU output responses.

MEMS inertial sensor testing: Generate multiple sine/random vibration excitations and synchronously collect sensor outputs.

Magnetic resonance gradient coil drive (pre discharge): high update rate, low delay waveform output.

Battery Management System (BMS) simulation: Simulate multiple cell voltages to validate BMS balancing algorithms.

10.2 Performance Optimization Techniques

Fully utilize hardware waveform generation: Pre load repetitive waveforms into FIFO to avoid frequent CPU interrupts.

Reasonable selection of triggering mode: Using delay triggering can achieve phase shift between multiple output channels, equivalent to digital phase shift.

Reduce output noise: Use an external low-noise reference source and keep the output cable as short and shielded as possible.

When synchronizing multiple cards: it is necessary to ensure that the SSI cable length is consistent and follow the master-slave clock allocation rules to avoid clock skew.

Environmental specifications and reliability

Working temperature: 0 ° C to 55 ° C.

Storage temperature: -20 ° C to 70 ° C.

Humidity: 5% to 95% (without condensation).

Power consumption: Taking DAQe-2501 as an example,+3.3V 0.78A,+12V 0.66A; The DAQ/PXI version is mainly+5V 1.6A. Sufficient margin should be reserved when designing system power supply, especially during multi card synchronization.