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ADLINK PCIe PXIe-8565 Expansion Kit Remote Control and Compatibility

F: | Au:FANS | DA:2026-08-20 | 45 Br: | 🔊 点击朗读正文 ❚❚ | Share:


ADLINK PCIe PXIe-8565 Expansion Kit Remote Control and Compatibility

In the fields of automated testing, data acquisition, and military electronics, the PXI/PXIe platform has become the industry standard due to its modularity, high bandwidth, and robust structure. However, PXIe chassis typically require dedicated embedded controllers or external PCs to be controlled through PCIe bridging. Traditional solutions are limited by bus distance (usually less than 0.3 meters), resulting in the host having to be close to the tested object, which is extremely inconvenient in environments with high temperatures, vibrations, or limited space. The PCIe-PXIe-8565 expansion kit launched by ADLINK utilizes PCI Express Gen1 x1 technology to achieve a remote connection of up to 7 meters between the host and PXIe chassis, while maintaining complete hardware and software transparency. This article will provide engineers with a complete practical guide from the aspects of system architecture, installation configuration, power on timing, LED status diagnosis, and the most critical PCI bus resource compatibility issues, to help them efficiently deploy this expansion solution and quickly locate faults.

System architecture and transparency advantages

The PCIe-PXIe-8565 expansion kit consists of three parts:

PCIe-8560 Host Adapter Card: Installed in the PCIe x1 (or higher) slot of the host PC, it adopts a low profile design (87 × 69mm), with a typical power consumption of 4W and a maximum power consumption of 8W.

PXIe-8565 system module controller: 3U PXIe specification, installed in the system slot of the PXIe chassis, supports PXI-5 PXI Express hardware specification Rev. 2.0.

ACL-EXPRESS high-speed cable: available in three lengths of 1 meter, 3 meters, and 7 meters, using shielded twisted pair cables, supporting PCIe Gen1 x1 signal rate (2.5GT/s), with an effective data throughput of 250MB/s.

This kit achieves protocol conversion through PCIe bridge chips, allowing all modules inside the PXIe chassis to be viewed by the host BIOS and operating system as devices directly connected to the host PCIe bus. Therefore, there is no need to install any additional drivers (but ADLINK PXI Platform Services need to be installed to support SMBus controllers and PXI software frameworks), achieving plug and play functionality. This transparency greatly reduces the difficulty of system integration.


Hardware installation steps and key precautions

1. Installation of PCIe-8560 on the host side

Turn off the host power and select any x1, x4, x8, or x16 PCIe slot to insert the PCIe 8560. This card only uses x1 links, but can be installed in longer slots.

After installation, the baffle screws need to be fixed to ensure good grounding.

2. Installation of PXIe-8565 on the PXIe chassis end

Must be installed in the PXIe system slot, do not insert into peripheral slots.

Before installation, check the type of chassis backplane: This controller supports 4-link (x1 x1 x1) or 2-link (x1 x1) configurations and can automatically detect the backplane topology without the need for manual settings.

3. Cable connection

Connect one end of the ACL-EXPRESS cable to the dedicated connector on the PCIe-8560 panel and the other end to the corresponding interface of the PXIe-8565 module. Be sure to tighten the fixing screws to ensure reliable grounding of the shielding layer.

It is strictly prohibited to plug or unplug cables when the system is powered on, otherwise it may cause the host to blue screen or the chassis to lose control.


Power on timing - critical and often overlooked

Due to the PCIe switch connection between PCIe-8560 and PXIe-8565, during the POST (Power On Self Test) phase of the host BIOS, the system scans the PCIe bus and allocates resources (I/O address, memory space, IRQ, and bus number). To enable the BIOS to correctly recognize all modules in the remote PXIe chassis, the following sequence must be strictly followed:

First, turn on the PXIe chassis power (while the host remains turned off).

Wait for the chassis status LED to indicate "ready" (PWR/PRSNT indicator light is orange or green).

Turn on the host power again.

Reason: When enumerating PCIe devices, the host BIOS needs to detect the presence of the PXIe-8565 bridge and its subordinate devices. If the chassis is not powered on and the bridge cannot respond to configuration requests, the BIOS will ignore the bus branch, causing it to be unrecognizable even if the chassis is powered on in the future. Once such a situation occurs, the power must be cut off simultaneously and reconnected in the correct order.

The shutdown sequence is the opposite:

First, shut down the host operating system and power off.

Turn off the PXIe chassis power again.

If this order is violated (turn off the PXIe chassis first), the host PCIe bridge will detect that the device has been accidentally removed, which may cause system crashes or data loss.

LED status indicator diagnosis

Both PCIe-8560 and PXIe-8565 are equipped with status LEDs for quick determination of link status:

PCIe-8560(STATUS LED):

Extinguish: Not powered on or without a link.

Always on: PCIe Geni link activated (working normally).

PXIe-8565 (PWR/PRSNT and LINK dual LED):

PWR/PRSNT: Off=No power supply; Orange=Chassis powered on but no PCIe-8560 detected; Green=Host side card detected.

LINK: Off=no link; 0.5Hz flicker=PCIe Gen1 link activated.

During normal operation, the host side STATUS is constantly on, the chassis side PWR/PRSNT is green, and LINK is flashing. If LINK is off, check if the cable connection is secure or try replacing the cable/slot.


Core compatibility issue: PCI bus number resource

This is the most common and challenging source of failure for this expansion kit. Due to the fact that PCIe PXIe-8565 is essentially a PCIe to PCI bridge (or PCIe switch), it consumes multiple PCI bus numbers. The host BIOS needs to assign a unique PCI bus number (range 0-255) to each bridge device and downstream device during startup. If there is insufficient available bus number, it will cause the system to fail to start or the device to be missing.

1. PCI bus number consumption mechanism

The system slot of the PXIe chassis itself occupies one bus number.

Each PXIe peripheral slot (whether or not a module is inserted) reserves a bus number, as PCIe switches on the backplane need to create independent bus segments for each slot.

The PCIe switch chip itself also occupies several bus numbers for internal routing.

Some PXIe modules (such as FPGA cards with bridges) may consume additional bus numbers.

According to Appendix A of the manual, the bus number requirements for a typical ADLINK chassis are as follows:

PCIe-PXIe-8655+PXES-2590 (9-slot chassis): 27 bus numbers

PCIe PXIe-8655+PXES-2780 (18 slot chassis): 44 bus numbers

2. How to check available bus numbers

By using a third-party tool such as System Information Viewer (SIV) and running it, you can view PCI Bus → ACPI Buses to obtain the maximum bus number assigned by BIOS. If the value is less than the chassis requirement, compatibility issues will inevitably arise.

3. Troubleshooting and resolution steps

When a module is missing or the system cannot start in the Device Manager, try in the following order:

① Confirm that the hardware connection and LED status are normal (see Section 4).

② Update the host BIOS to the latest version. Many motherboard manufacturers increase the maximum number of assignable bus numbers through BIOS updates, especially for the Intel C602/C612/C621 chipset and subsequent platforms.

③ Disable unnecessary onboard devices (such as serial ports, parallel ports, onboard audio, secondary network cards, SATA controllers, etc.) in BIOS settings to free up PCI resources.

④ Remove all non essential PCI/PCIe cards inside the host, leaving only the graphics card and PCIe-8560 to reduce bus number competition.

⑤ Try inserting the PCIe-8560 into different PCIe slots. Some slots are directly connected to the CPU (providing more bus numbers), while others go through PCH (which may limit resources).

⑥ Change the installation sequence of modules in the PXIe chassis. Some modules occupy a lot of resources and inserting them into different slots may affect bus allocation. Try inserting each module one by one for testing.

⑦ Replace the host or motherboard. If the above is not effective, consider using server grade motherboards (such as Supermicro X11 series) or workstation motherboards, which typically provide a larger bus number pool.

⑧ Check the integrity of the cables. Cable bending or poor contact may cause link training failure, indirectly affecting resource enumeration.


FAQ (based on manual)

Q1: What is the maximum extension distance?

A: 7 meters, providing three types of cables: 1/3/7 meters.

Q2: Do you need additional drivers?

A: ADLINK PXI Platform Services (including SMBus drivers and PXI software framework) need to be installed, which is not completely driver free.

Q3: Does it support 4-link or 2-link?

A: Automatically detect and adapt, no configuration required.

Q4: How to choose a suitable host PC?

A: The primary focus is on the number of PCI bus numbers that BIOS can allocate. It is recommended to use Intel 6 series and above chipsets and update the BIOS. Pre evaluate using SIV tools.

Q5: How to solve module missing?

A: Refer to the multi-step troubleshooting plan in Section 5, which focuses on releasing the bus number and adjusting the installation sequence.


Performance and selection suggestions

This kit provides a throughput of 250MB/s, which is sufficient to meet most data acquisition, image acquisition (single GigE or Camera Link), and mixed signal testing needs. If higher bandwidth is required (such as multi-channel high-speed digitizers), PCIe Gen2 or Gen3 expansion solutions can be considered, but this kit has significant advantages in cost-effectiveness and compatibility.

When selecting, choose the corresponding cable length (1/3/7 meters) based on the physical distance between the host and the chassis, pay attention to the bending radius of the cable, and avoid excessive bending that affects signal integrity. The chassis system slot must be PXIe (with PCIe backplane) and does not support pure PXI (32-bit PCI) chassis.


Maintenance and Precautions

Connector lifespan: PCIe high-speed connectors may experience increased insertion loss and affect signal quality after multiple insertions and removals (over 200 times). It is recommended to reduce unnecessary insertions and removals.

Anti static: Always wear a grounded wristband during operation.

Power timing: Strictly follow the sequence of chassis first and then the host.

Firmware Update: Regularly follow the ADLINK official website to update PXI Platform Services and firmware to fix known issues.

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