MVME6100 Single-Board Computer

The MVME6100 Single-Board Computer Programmer’s Reference Guide

provides general programming information, including memory maps,

interrupts, and register data for the MVME6100 family of boards. This

document should be used by anyone who wants general, as well as

technical information about the MVME6100 products.

As of the printing date of this manual, the MVME6100 supports the

models listed below.

Overview of Contents

This manual is divided into the following chapters and appendices:

Chapter 1, Board Description and Memory Maps, provides a brief product

description and a block diagram. The remainder of the chapter provides

information on memory maps and system and configuration registers.

Chapter 2, Programming Details, provides additional programming

information including IDSEL mapping, interrupt assignments for the

MV64360 interrupt controller, flash memory, two-wire serial interface

addressing, and other device and system considerations.

Appendix A, Related Documentation, provides a listing of related

Motorola manuals, vendor documentation, and industry specifications.

Comments and Suggestions

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In all your correspondence, please list your name, position, and company.

Be sure to include the title and part number of the manual and tell how you

used it. Then tell us your feelings about its strengths and weaknesses and

any recommendations for improvements

Conventions Used in This Manual

The following typographical conventions are used in this document:

bold

is used for user input that you type just as it appears; it is also used for

commands, options and arguments to commands, and names of

programs, directories and files.

italic

is used for names of variables to which you assign values, for function

parameters, and for structure names and fields. Italic is also used for

comments in screen displays and examples, and to introduce new

terms.

courier

is used for system output (for example, screen displays, reports),

examples, and system prompts.

<Enter>, <Return> or <CR>

represents the carriage return or Enter key.

Ctrl

represents the Control key. Execute control characters by pressing the

Ctrl key and the letter simultaneously, for example, Ctrl-d.

REF_CLK

Reference clock. This bit reflects the current state of the 28.8 KHz

reference clock derived from the 1.8432 MHz UART oscillator divided

by 64. This clock may be used as a fixed timing reference.

BANK_SEL

Boot Flash bank select. This bit reflects the current state of the boot

Flash bank select jumper. A cleared condition indicates that Flash bank

A is the boot bank. A set condition indicates that Flash B is the boot

bank.

SAFE_START

ENV safe start. This bit reflects the current state of the ENV safe start

select jumper. A set condition indicates that MOTLoad should provide

the user the capability to select which Boot Image is used to boot the

board, cleared MOTLoad should proceed with the first boot image

found.

ABORT_L

Abort. This bit reflects the current state of the onboard abort signal.

This is a debounced version of the abort switch and may be used to

determine the state of the abort switch. A set condition indicates that

the abort switch is not depressed while a cleared condition would

indicate that the abort switch is asserted.

FLASH_BSY_L

FLASH Busy. This bit provides the current state of the Flash Bank A

StrataFlash device Status pins. These two open drain output pins are

wire ORed. Refer to the appropriate Intel StrataFlash data sheet for a

description on the function of the Status pin.

FUSE_STAT

Fuse Status. This bit indicates the status of the onboard fuses. A

cleared condition indicates that one of the fuses is open. A set

condition indicates that all fuses are functional.

SROM_INIT

SROM Init. This bit indicates the status of the SROM Init. A cleared

condition indicates that the SROM Init is disabled. A set condition

indicates that the SROM Init is enabled and the MV64360 was

initialized using the MV64360 User Defined Initialization SROM at

$A6.

Flash Memory

The MVME6100 contains two banks of flash memory accessed via the

Device Controller bus contained within MV64360. Each bank contains

from 8MB to 64MB of 32-bit wide Boot Block flash memory provided by

two 16-bit wide Intel StrataFlash devices.

The Boot Bank is jumper selectable to select either flash bank as the boot

bank. The jumper effectively swaps the chip selects to the two flash banks

so that either bank can be used as the boot bank. The state of the jumper is

readable in the BANK_SELECT bit of System Status Register 1 to

properly set up the MV64360 Device Controller Bus memory maps.

The boot device bank is the same as any of the other device banks except

that its default address map matches the PowerPC CPU boot address

(0xfff0.0100) and that its default width is sampled at reset.

Real-Time Clock and NVRAM

The Real-Time Clock/NVRAM/Watchdog Timer is implemented using a