ADLINK PXIS-2719A Chassis Deployment Monitoring Guide

ADLINK PXIS-2719A 19 Slot PXI Chassis Deployment and System Monitoring Guide

In large-scale automated testing systems, multi-channel data acquisition, and mixed signal measurement applications, the number of slots, heat dissipation capacity, backplane signal integrity, and system management functions of PXI chassis directly determine the scalability and reliability of the entire platform. ADLINK PXIS-2719A is a 19 slot 3U PXI chassis, providing 1 system slot and 18 peripheral slots, compatible with PXI and CompactPCI specifications, and built-in intelligent monitoring module, supporting remote RS-232 interface for real-time monitoring and control of temperature, fan speed, and DC voltage. This article is aimed at testing system integration engineers, detailing the engineering deployment and operation points of the chassis from chassis architecture, backplane trigger bus segmentation, system reference clock priority, forced air cooling design, to remote monitoring software deployment and API secondary development, to help build a high-density and high stability PXI testing platform.

Product positioning and core specifications

PXIS-2719A is a 3U PXI chassis that complies with the PXI specification Rev. 2.2. It uses an industrial grade 600W AC power supply (input 100-240VAC, 50-60Hz) and can accommodate up to 19 PXI/CompactPCI modules (including 1 system slot and 18 peripheral slots). Its key features include:

Backplane performance: The maximum skew of the system reference clock (10MHz) between slots is only 300ps, and it supports external 10MHz clock input (BNC interface).

Heat dissipation design: The rear three sets of fans with a total air volume of 185.9 CFM adopt a bottom inlet and rear exhaust duct design to ensure uniform heat dissipation in each slot, with a working temperature range of 0-55 ℃.

Intelligent monitoring: Built in MCU (microcontroller), monitoring 8 temperature sensors, 3 fan speeds, 5 DC voltages (5VSB, 3.3V, 5V, 12V, -12V), and supporting remote status reading and control of power switches and fan modes through RS-232 serial port.

Physical specifications: Can be rack mounted (with installation kit), weighs 14.5kg, and meets the standard 19 inch rack size.

This chassis is recommended to be paired with ADLINK PXI-3950 (Core 2 Duo) or PXI-3920 (Pentium M) controllers, and is also compatible with other PXI system controllers (occupying up to 3 slots).

Key points for mechanical layout and installation

2.1 Chassis Structure and Cooling Air Ducts

Air intake: There are air intake holes at the bottom and below the front panel, through which cold air enters.

Exhaust: The three rear fans expel hot air from the back.

Gap requirements: When installing the rack, at least 1U (44.5mm) clearance should be reserved for the bottom air inlet, and at least 76.2mm (3 inches) distance should be reserved for the rear exhaust outlet to ensure smooth airflow.

Filler panel: All unused slots must be equipped with a filler panel (included) to prevent airflow short circuits and ensure uniform heat dissipation.

2.2 System Controller Installation (Slot 1)

The system controller slot is located on the far left and supports controllers with a width of 3 slots (such as ADLINK 3U PXI controllers). Installation steps: Release the ejector → Insert along the guide rail → Lift the lock → Tighten the panel screws. Note that the controller needs to be pre installed with CPU, memory, and storage devices.

2.3 Installation of Peripheral Modules (Slot 2~19)

Slot 2 is a Star Trigger slot that can be installed with a dedicated Star Trigger controller or a regular peripheral module. The remaining slots 3 to 19 are standard peripheral slots.

Important warning: Do not install CompactPCI modules with rear I/O functionality, as rear I/O signals may conflict with PXI specific signals (located at J2 connector), which may cause damage to the module or backplane.

2.4 Power on operation

Connect the power cord to the rear C14 power interface, and the socket should be grounded.

Place the "INHIBIT" switch on the rear panel in the "DEF" (default) position, and the power button on the front panel can control the power on/off.

Press the blue power button on the front panel to start the system; Press again to shut down (it is recommended to use the operating system software to shut down first).

Backplane architecture and signal routing detailed explanation

3.1 Triggering bus segmentation and direction control

The backplane of PXIS-2719A provides 8 PXI Trigger Buses, but in order to reduce load and signal reflection, it is divided into three physical segments:

Segment 1: Slot 1-6

Segment 2: Slot 7~12

Segment 3: Slot 13~19

The three segments are connected by two buffers, and the connection status and direction are controlled by onboard DIP switches (P2, P3, P4, P5 on SWY1). The specific functions are as follows:

P2: Enable the buffer between segment 1 and segment 2 (ON connection, OFF isolation).

P3: Enable the buffer between segment 2 and segment 3.

P4: Section 1 ↔ Direction of buffer in segment 2 (ON indicates from left to right, i.e. segment 1 → segment 2; OFF means from right to left.