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ADLINK MVP-6100 Industrial Control Computer: PCI/PCIe Expansion and Robust Design

F: | Au:FANS | DA:2026-08-14 | 404 Br: | 🔊 点击朗读正文 ❚❚ ▶ | Share:

4-channel backplate (MVP-614X series)

1 x PCIe x16 Gen3 (main slot)

2 x PCIe x4 Gen3 (open slot, compatible with x16 physical cards)

1 x PCI slot (same as the same bridge)

All PCIe slots share the PCIe resources of the CPU, and the backplane provides independent 12V auxiliary power supply (through an additional power connector) to ensure stable operation of high-power expansion cards.

The backplane also provides SATA power/signal connectors, USB 2.0 dongle interfaces, and fan connectors for easy expansion card assisted heat dissipation.

Internal expansion and debugging interface

The motherboard provides rich expansion and debugging interfaces internally (see Figure 3-12):

1 x Mini PCIe full-size slot (USB 2.0+PCIe)

1 × M.2 2280/3042 Key B/M, supports USB 3.1, SATA 6Gb/s, and PCIe x2 (C246 model)

2 x USIM card slots for Mini PCIe or M.2 cellular modules

2 × I ² C bus (3.3V/5V level)

TPM 2.0 security chip

GPS module power pin (5V)

12V fan connector (PWM control)

Clear CMOS jumper, used to restore BIOS default settings

External PWR/RESET pin arrangement for remote control of the cabinet

12V power pin (for AFM MxM carrier board)


Mechanical installation and heat dissipation design

Dimensions and Weight

MVP-612X: 165 (W) × 240 (D) × 210 (H) mm, weight 4.8kg

MVP-614X: 206 (W) × 240 (D) × 210 (H) mm, weight 5.1kg

The chassis is made of all aluminum profiles, with passive heat dissipation (fanless) relying on large-area heat dissipation fins and natural convection. To optimize heat dissipation, the manual clearly requires:

Wall mounting direction: The front and rear panels must be located on both sides (horizontally installed), and it is strictly prohibited to have the top or bottom facing upwards.

Use 6 × M4 screws (length 6mm) to fix the wall bracket, and the final wall installation can use 4 lock holes or 6 circular holes.

DC power supply

Supports 12V~24V wide voltage input (± 10% tolerance), with a current requirement of 21A@12V or 10.5A@24V (Minimum value). The optional AC/DC adapter is 24V/10.5A (220W or 280W). Polarity: The center pin is positive (V+), reverse connection will cause irreversible damage.


Key BIOS settings (for stability and compatibility tuning)

MVP-6100 is based on Aptio UEFI and can be accessed by pressing Del on startup and F7 on the boot menu. The following are the settings closely related to industrial deployment:

1. CPU and Power Management (Advanced → CPU Configuration/Power Management)

Hyper Reading: It is recommended to enable (Windows/Linux optimization).

Active Processor Cores: Can limit the number of enabled cores for power optimization or software licensing restrictions.

Intel Virtualization Technology: Enable support for virtual machines.

SpeedStep/Speed Shift: Allow dynamic frequency modulation.

TCC Activation Offset: Adjust the triggering temperature of overheat protection (0~63).

State After G3: Set the power on behavior after power failure recovery (Last State/Always On/Always Off).

RTC Wake: timed wake-up function.

Ring Wake/PCIe Wake: Wake up network or PCIe devices.

2. Serial port mode and onboard device configuration

COM1/COM2 can be independently set as RS232/422/485.

Three LAN ports can be independently enabled/disabled.

3. Hardware Monitoring and Fan Control (NCT6106D HW Monitor)

Real time display of CPU temperature, motherboard temperature, fan speed, and voltage. Fan control mode:

Manual: Fixed PWM duty cycle

Auto: Automatic speed regulation

SMART FAN IV: Customize Four Temperature Speed Maps

4. BIOS Watchdog

After activation, the POST phase starts the watchdog and automatically resets upon timeout to prevent startup freezing.

5. Storage and RAID (Chipset → SATA and RST Configuration)

SATA mode can be selected as AHCI or RAID (only C246 supports RAID).

Support hot plug design.

SATA controller speed adjustable (Gen1/2/3).

6. Backplane PCIe Configuration (Chipset → Backplane PCIe Configuration)

The maximum link speed (Auto/Gen1/Gen2/Gen3), device detection timeout (100~65535ms), and PERST signal effective minimum/maximum time for each PCIe slot can be configured separately to be compatible with expansion cards from different manufacturers and avoid recognition failures caused by timing mismatches.


Watchdog Timer (WDT) and Digital I/O (DIO) Development Library

WDT programming

The hardware watchdog is based on NCT6102D (LPC IO) and provides Windows API and Linux register examples.

InitWDT(), SetWDT (tick, unit) (tick 1-255, unit=0 seconds/1 minute) StartWDT()、ResetWDT()、StopWDT()。

The Linux example directly operates the 0x4E/0x4F registers, configures logical device 8, sets timeout values, starts and feeds the dog.

DIO programming

Provide awl. h and awl. lib, functions:

AwlDioGetValue (Index): Read DI channels (1-8)

AwlDioSetValue (Index, Value): Write DO channel (0/1)

Output as open drain, pay attention to external pull-up and load current limitations.


Power consumption reference and power selection

Appendix A of the manual provides the measured power consumption under 24V power supply (including typical peripherals):

Xeon 80W: 24W idle, 130W processor fully loaded, 160W system fully loaded

Core i7 65W: 21W idle, 144W full load

Core i7 35W: 24W idle, 97W full load

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