Manage output fault response (clear or hold);
Hardware configuration is completed through two sets of DIP switches (SW1 sets the starting address of the rack, and SW3-SW5 sets the capacity of each slot point).
2.5 Network and Communication Options
The processor rack slot M can install the following communication modules to achieve system level interconnection:
Control Network Module (CNM) 620-0038: High speed peer-to-peer communication, up to 8 nodes sharing I/O status, transmission medium is single pair twisted pair cable (4000 feet) or optional dual axis cable (8000 feet), network polling time ≤ 18ms.
Communication Interface Module (CIM): Supports Modbus RTU, Honeywell DMCS, ABC protocol, and is used for serial communication with 627 series products and other smart devices.
Hiway Interface Module (HIM): Connect Honeywell TDC-3000 data highway to achieve PLC and DCS integration.
Operator Panel Interface Module (OPI): Connect on-site buttons, keyboard displays, etc. through coaxial cables.
2.6 Programming and Monitoring Equipment
623-6000 Loader/Terminal: a dedicated programming terminal that supports ladder diagram editing, monitoring, document generation, and EPROM programming.
623-60 MS-DOS Loader: A personal computer programming software based on MS-DOS, compatible with L/T tape format, supporting symbol addressing and online programming.
627 LOS local operation station: an industrial grade MS-DOS AT compatible workstation that provides supervisory control and operator interface.

System configuration and address allocation
3.1 Processor Rack I/O Slot Configuration
The SW1 and SW2 on the MPU board of the processor module are used to define the I/O point capacity of slots A-H in the processor rack. Each slot corresponds to a set of "first setting/second setting" switches, configured according to the table:
Module type first setting second setting
0-point (empty) closure/ON closure/ON
Open/Close/ON at 8 o'clock
16 o'clock closing/ON opening/OFF
32 point disconnect/OFF disconnect/OFF
The factory defaults to setting all slots to 32 points. When configuring, the corresponding switch needs to be modified according to the actual installation module.
3.2 Parallel I/O Rack Address Allocation
The PIOM of each I/O rack is set to the rack starting address through SW1 (8-bit, binary weights 8/16/32/64/128/256/512/1024). Rule:
The slot A of the processor rack has a fixed starting address of 0.
The starting address of the first I/O rack is equal to the ending address of the processor rack plus 1.
The starting address of the subsequent I/O rack is equal to the ending address of the preceding rack plus 1.
The starting address of the last rack must not exceed 184.
Each I/O slot is configured with point capacity through PIOM's SW3, SW4, and SW5 according to the same switch table as the processor rack. Supports mixing 8, 16, and 32 point modules in the same rack, but must be set correctly for each slot.
3.3 Output fault response configuration
PIOM's SW2-1 determines that when an output module fault, cable disconnection, external power failure, or processor entering Program/Disable mode is detected, the output of this rack should be reset to zero (closed/ON) or remain in its final state (open/OFF). SW2-2 determines whether to recognize output module faults (closed/ON recognition, open/OFF ignored).
The processor module interface board SW1 can also configure the response of the processor rack output to faults.
Operation mode and program execution
4.1 Three operating modes
Front panel three position key switch selection system status:
Program mode: The processor only responds to commands from programming terminals or CIM, does not scan user programs, and does not update I/O. The output status is reset or maintained according to PIOM settings.
DISABLE mode: Execute user program, update output status table, but do not update actual physical output. Used for debugging and safety interlock testing.
RUN/PROGRAMME mode: When the key is in this position, it can be requested through software to switch between RUN and PROGRAMME sub modes. Under normal operating conditions, the processor is in RUN sub mode, performing scans and updating I/O.
Mode priority: RUN/PROJECT>DISABLE>PROGRAMME. CIM can place the processor in lower priority mode, but cannot elevate it to high priority mode; The programming terminal can request the Program mode and has the highest control authority.
4.2 Program scanning cycle
A complete scanning cycle includes:
Input Status Scan (ISS): Approximately 2ms, the processor sends a gate pulse to all input modules, locks the current input data, and checks for output module faults. The fault address is stored in the system status table.
User program execution: Solve the ladder diagram logic item by item, and update the output status table and physical output immediately when executing the output instructions.
End processing: When encountering EOM (End of Memory) instruction or user programmed "Return to Program Start" instruction, restart the next cycle.
If the Control Network Module (CNM) is installed, the scanning cycle will increase by approximately 4.2ms.