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Saia PCD4.U100 Kit System Upgrade Guide

F: | Au:FAN | DA:2026-03-26 | 568 Br: | 🔊 点击朗读正文 ❚❚ | Share:

Saia PCD4.U100 System Upgrade Kit: A Smooth Migration Guide from Classic to Modern

In the field of industrial automation, technological iteration and system upgrading are inevitable requirements for maintaining equipment competitiveness and improving operational efficiency. For users using the Saia PCD4 classic series PLC, upgrading their core control system to the new generation PCD2.M5 or PCD3. M series platforms based on NT-OS is an ideal choice to improve performance and extend the system lifecycle. The PCD4.U100 kit was born for this purpose, serving as a bridge between old and new platforms, allowing users to enjoy higher processing speeds and richer features brought by the new CPU while retaining their existing investment in PCD4 I/O modules. This article aims to provide a comprehensive and professional technical reference for automation engineers by delving into the official technical manual of the PCD4.U100 suite, systematically explaining the key technical points, operational steps, and precautions throughout the entire migration process.


Part 1: Migration Preparation and Compatibility Assessment

A successful system upgrade begins with careful planning and comprehensive compatibility checks.

1.1 Core migration process

At the beginning of the manual, a clear migration checklist is provided, outlining the execution path of the entire project:

Hardware check: First, confirm that all existing PCD4 I/O modules can be used in the new system.

Hardware installation: Replace the original PCD4 CPU with the PCD4. U100 kit and install a new PCD2. M5 or PCD3. M series CPU. The original PCD4 I/O module will continue to be used.

Software preparation: Ensure Saia PG5 ®  Develop software version not less than 1.4.300 (patch 15 must be installed) or 2.0.150 (SP1).

Project conversion: Open the original project in PG5. For projects programmed using Fupla (Function Block Diagram) or IL (Instruction List), the system will automatically or manually update the code.

Download and debug: After completing the program adaptation, download the new program to the new CPU and perform system testing.

1.2 Hardware Compatibility Checklist

Before starting the physical installation, it is necessary to strictly check the compatibility list to avoid hardware damage or system failure caused by incompatibility.

Supported CPUs: CD2.M5xxx (firmware version 1.10.16 or higher) and PCD3.Mxxxx (firmware version 1.10.16 or higher). These new CPUs are all equipped with the NT-OS operating system.

Power module: PCD4. N2x0 power module, and the hardware version needs to be B or updated. The manual specifically warns that using older versions of power modules may damage the PCD4.U100 kit, which requires high attention.

Unsupported modules: All PCD4. HXxx series modules (such as high-speed counting, positioning, and other intelligent modules) are not supported. This means that during the upgrade process, if the original system contains such modules, alternative solutions or redesign of related functions need to be sought.

Software version: As mentioned earlier, the specified version or higher of Saia PG5 must be used ® Develop software to ensure that new I/O libraries and functional blocks can function properly.


Part 2: Hardware Installation and Addressing Mode Configuration

The core of hardware installation lies in the connection of the PCD4.U100 kit and the address allocation of new and old I/O modules.

2.1 Role of PCD4.U100 kit

The PCD4.U100 kit is essentially an adapter that connects the new PCD2/3 CPU to the existing PCD4 I/O rack. It converts the high-speed I/O bus of the new CPU into signals that the old PCD4 system can recognize, while processing power and address mapping. The correct installation of this module is the physical foundation for achieving the integration of old and new platforms.

2.2 Selection and Influence of Addressing Modes

This is one of the most critical technical decisions in the migration process, determining how the new CPU "sees" and manages physical I/O points. A micro switch on the back of the PCD4. U100 module provides four addressing modes, with two main modes being the most commonly used:

Mode 1: Address starts from '0' (no new I/O module)

In this mode, the address space of the PCD4 I/O module starts from 0 and is directly mapped to the I/O bus of the new CPU.

Advantages: The original PCD4 program does not require any address changes and can be used directly.

Cost: Unable to add any new PCD2/3 I/O modules to the idle slots of the new CPU. Because address 0 is already occupied. This also means that no intelligent modules (such as PCD2/3. Fxxx communication modules) or memory modules (such as PCD2/3. R6xx) can be added.

Applicable scenarios: Only perform CPU upgrades, do not expand any new hardware, and strive to minimize program changes.

Mode 2: Address starting from '256' (new I/O modules can be added)

In this mode, the addresses of all PCD4 I/O modules are offset by 256. For example, the module with the original address of 0 has its address changed to 256 in the new system.

Advantages: The 0-255 address range on the new CPU bus is released and can be used to install up to 8 new PCD2/3 I/O modules. This provides the possibility for system expansion.

Cost: The original user program needs to address adjust all I/O access instructions by adding 256 to the original address. At the same time, the PCD4 watchdog address has also shifted from 255 to 511 (or higher).

Applicable scenarios: It is hoped that while upgrading the CPU, new I/O modules or communication modules can be expanded to enhance system functionality.

2.3 Dual handling of watchdog

The manual specifically mentions the issue of Watchdogs. In the PCD4 system, the watchdog address is usually located at 255 and 511. On the new CPU, the watchdog address is 255. When selecting the "Address Offset 256" mode, the address of the PCD4 watchdog changes to 511 (old watchdog address offset) and 767, distinguishing it from the CPU's built-in watchdog (address 255). This detail needs special attention when writing and maintaining diagnostic programs.

Part Three: Serial Communication and Differences between New and Old Systems

Hardware upgrades inevitably bring about some functional changes that require engineers to adapt at the software level.

3.1 Serial Communication Port

The serial communication port (such as RS-232) on the original PCD4 CPU is no longer available in the new system. All communication functions will be provided by the onboard serial port on the new PCD2/3 CPU or through the newly added PCD2/3. Fxxx communication module. Therefore, during the migration process, it is necessary to remap the operations on the old CPU serial port in the original program to the new communication port.

3.2 Changes in Key XOB Organizational Blocks

XOB is an organizational block in PCD systems that handles specific events (similar to interrupt programs).

XOB 5: In the original system, XOB 5 was used to process I/O exit (/IOQUIT) signals. The manual clearly states that in the new generation CPU, this signal no longer exists, so XOB 5 is no longer valid. All code related to XOB 5 should be commented out.

XOB 1: XOB 1 is used to detect power failures on the I/O bus. The manual states that in the new system, when a power failure is detected in the PCD4 I/O bus or expansion module (such as PCD3. C200), XOB 1 will be triggered, but the detection time is approximately 500ms. More importantly, it compares the differences in fault detection capabilities between the old and new PCD4 power modules (N200 and N210), such as N210 being able to simultaneously monitor+5V and ± 15V outputs, while N200 cannot detect ± 15V. This reminds engineers that the diagnostic ability of the upgraded system for power failures may change and needs to be considered in the program.


Part Four: User Program Migration and Adaptation

This is the most labor-intensive and technically advanced part of the entire upgrade project. The user program must adapt to the high-speed performance of the new CPU and different hardware architectures.

4.1 Fupla Programming Method

For users who use Fupla (functional block diagram) for programming, the adaptation process is relatively simple.

Prerequisite: Use Saia PG5 ®  1.4.300 Patch 15 or 2.0.150 SP1 and above versions.

Required libraries: Ensure that the latest versions of the "Analogue Module" and "HVC Analogue" libraries are installed.

Automatic update: In PG5 2.0, an activation tool needs to be run to enable PCD4 I/O FBoxes. Afterwards, when opening the old project, all function blocks (FBox) related to PCD4 I/O will be automatically updated to a version compatible with PCD4.U100.

4.2 Deep adaptation of IL programming method

For engineers who use instruction lists (ILs) for programming, the adaptation process is more critical and requires manual or semi manual modification of the code.

4.2.1 Critical 2-second startup delay

Due to the significantly higher processing speed of the new CPU compared to the old PCD4 CPU, a direct issue is that external PCD4 I/O modules may not have completed their own initialization when the new CPU is powered on and starts executing programs. This can cause the I/O module to not be configured correctly, resulting in system failures.

Solution: At the beginning of the program, a delay of at least 2 seconds must be enforced. The manual provides detailed implementation steps:

Create a new. src file (such as Wait_2s. src).

Write the following IL code in this file to implement an accurate 2-second delay loop:

text

$WAITFOR   ;  Wait for timer to start

BEGIN

SET  8 1   ;  Set up a timer for 2 seconds (depends on system tick)

; . .. (For specific timing cycle codes, please refer to the original manual)

END

Key step: In the Link Order setting of the project, the newly created Wait_2s.src file must be placed at the top of the link list. Ensure that it is executed before any other user program code.

This operation ensures that the program will first execute a 2-second wait during each CPU startup or cold start, giving the PCD4 I/O module sufficient initialization time.

4.2.2 Code adaptation for specific modules

In addition to the global startup delay, some I/O modules (such as PCD4. W100, W500, W600) require additional null operation (NOP) instructions to be inserted under high-speed CPUs due to their operational characteristics to ensure timing accuracy.

PCD4.W100 (Analog Module): In the operation sequence of analog-to-digital conversion (A/D) and digital to analog conversion (D/A), the manual clearly indicates the need to insert multiple NOP instructions. For example, after starting the A/D conversion, the program will poll a status bit (I15) to wait for the conversion to complete. In the original system, this waiting time may be sufficient, but on the new CPU, due to the fast execution speed, the results may be read before the conversion is completed. The inserted NOP instruction (NOP NOP NOP NOP) artificially adds several machine cycles to ensure correct timing.

PCD4. W500/W600 (Intelligent Modules): For these more complex modules, the manual recommends calling the configuration function block (CFB config) in XOB 16 (Startup Initialization Organization Block) to ensure proper initialization. This is more reliable than simple delay.

4.2.3 Unsupported modules

Once again, it is emphasized that all PCD4. HXxx series modules (such as high-speed counters, positioning modules, etc.) are not supported. If these modules are used in the original system, the migration project will not be able to proceed directly, and this part of the functionality must be redesigned and implemented.


Part 5: Summary and Best Practices

The PCD4.U100 kit provides a clear and feasible path for system upgrades for PCD4 Classic series users. It cleverly protects users' existing investments in I/O modules while introducing the high performance of the new generation CPU. However, a successful upgrade is not just a simple hardware replacement process, it requires engineers to have a deep understanding of the differences between the old and new platforms and strictly follow the instructions in the manual for software adaptation.

Best practice recommendations

Detailed compatibility review: Before starting the project, thoroughly inspect all existing hardware, especially the power module (N2x0) version and H-series intelligent module.

Software environment preparation: Ensure that the development environment (PG5) and all related library files are upgraded to the version required by the manual.

Carefully choose the addressing mode: Choose the address offset mode wisely based on whether new I/O modules need to be expanded in the future. Once selected, consistent modifications need to be made to all program addresses.

Pay attention to startup delay: For IL programming users, a 2-second startup delay is not optional, but mandatory. It must be strictly implemented according to the manual method and ensure the correct link order.

Step by step debugging: After completing the program adaptation, simulate or test it using small-scale hardware in an offline environment first, and then gradually connect it to the complete system to ensure that everything is foolproof.

Update documentation: After the upgrade is completed, it is necessary to update all relevant system drawings and program documentation, especially the I/O address mapping table, for future maintenance.

In summary, the PCD4.U100 upgrade kit is not only a hardware product, but also a systematic engineering solution. By following the detailed guidelines provided in this manual, engineers can confidently complete the migration from classic platforms to modern platforms, revitalizing automation systems and meeting future longer cycle production needs.

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