Siemens S5-90U/95U Fault Diagnosis and Advanced Programming

Many advanced features of S5-90U/95U are parameterized through the integrated data block DB1. DB1 is interpreted and executed when the PLC switches from STOP to RUN. The default DB1 is integrated into the CPU, and users can modify and download it as needed.

DB1 consists of multiple parameter blocks, each starting with a block ID; End. Common parameter blocks include:

OBI: Parameterized interrupt input. For example, on S5-95U, IP 0 indicates configuring input I34.0 as a rising edge interrupt; IN 1 indicates that I34.1 is configured as a falling edge interrupt; IPN 2 indicates that I34.2 is configured to trigger interrupts for both rising and falling edges.

OBC: Parameterized onboard counter. For example, CAP 500 indicates that counter A is configured for rising edge counting, with a comparison value of 500. CCN 90000 represents cascading two counters into a 32-bit counter, with a falling edge count and a comparison value of 90000.

SDP: System parameter settings (S5-95U only). NT 128 sets the number of internal timers processed by the system (default is 128, if the program only uses 20, changing to 20 can shorten the scanning cycle). When PBUS N is set to start the PLC, it does not check the external I/O bus. If it is changed to PBUS J, the PLC can only enter RUN mode when the external I/O bus is ready.

CLP: Real time clock parameters (S5-95U only). STW MW10 specifies the status word at MW10, and CLK DB5 DW0 specifies the clock data area at the beginning DW0 of DB5.

Parameter error handling: If there are syntax errors or parameter overruns in DB1, the PLC will remain in the STOP state when switching from STOP to RUN. At this point, you can obtain detailed error codes by adding ERT: Error Return Parameter Block (such as ERR MW2) to DB1. The error code will be written into the continuous word starting from MW2, with the high byte indicating the error type (such as "range violation", "syntax error") and the low byte indicating the erroneous parameter block (such as OBC: corresponding to code 03). This can greatly improve the debugging efficiency of parameter configuration.

4. Advanced programming skills and performance optimization

In addition to basic bit logic, the S5-95U also offers a range of advanced operations that can be mastered to write more efficient and compact programs.

Bit testing operation (TB, TBN): allows you to directly test a bit of a word and set RLO based on the state of that bit. This is much more efficient in processing state information in words than loading words first and then using the 'and' operation for masking. For example, TB D 12.8 directly tests the 8th bit of data word DW12.

DO operation: This is a powerful tool for implementing indirect addressing. The DO FWx or DO DWx statement itself does not perform any operations, but it tells the CPU that the operand address of the next statement is dynamically determined by the content of the specified flag or data word. For example, first set the value of FW10 to KH 0108 (high byte=bits of the address, low byte=bytes of the address), and then execute:

step5

DO FW10

A F 0.0

This is equivalent to AF 8.1. By cyclically changing the value of FW10, a few lines of code can be used to achieve functions that originally required a lot of repetitive code, such as batch initializing data areas.

Scanning cycle and response time calculation: The manual provides precise formulas for calculating scanning cycle and response time. This is crucial for time sensitive applications. For example, the scanning time of S5-95U=process image transfer time (depending on the number and type of I/O modules)+operating system runtime (fixed at 500 µ s)+program execution time+timer update time. In the worst-case scenario, the response time needs to consider that the input signal changes only after PII reading, requiring three times the process image transfer time, three times the operating system runtime, and two times the program execution time.

Fine management of interrupt priority: S5-95U supports multiple interrupt sources (4 external interrupts, 2 counter comparison interrupts). When interrupts occur simultaneously, the execution order is: counter B>interrupt input>counter A. In addition, up to 8 interrupt events can be temporarily stored in the queue. By using IA (disable interrupt) and RA (enable interrupt) operations, you can protect critical segments of the program from interruption and ensure data consistency. For example, using IA and RA before and after performing TNB (block transfer) operations can prevent interruptions during the transfer process, thereby ensuring the integrity of the data source and target areas.

5. Analog quantity and communication processing

Analog processing: The onboard analog input of S5-95U is 0-10V with a resolution of 10 bits. The manual provides two standard functional blocks, FB250 and FB251, to simplify the reading and scaling of analog signals. FB250 can linearly map raw digital quantities (0-1024) to user-defined engineering value ranges (e.g. 0-1000L/min). FB251 performs a reverse operation to convert engineering values into the digital format required by the analog output module.