The Spartan®-6 family provides leading system integration capabilities to meet the needs of high-volume applications at the lowest total cost. This 13-member family offers expanded density from 3840 to 147443 logic units, with half the power consumption of the previous Spartan family, and faster, more comprehensive connectivity. Built on proven 45nm low-power copper process technology, the Spartan-6 series offers the best balance between cost, power and performance by offering a new, more efficient dual-register 6-input Lookup Table (LUT) logic and a wealth of built-in system-level modules for you to choose from. These include the 2nd generation 18 Kb (2 x 9 Kb) Block RAMDSP48A1 slice, SDRAM storage controller, enhanced mixed-mode clock management module, SelectIO™ technology, power-optimized high-speed serial transceiver module, PCIExpress® compatible endpoint module, and more. Advanced system-level power management mode with automatic detection of configuration options and enhanced IP security with AES and device DNA protection. These capabilities provide a low-cost, programmable alternative to custom ASIC products with unprecedented ease of use. Spartan-6 FPgas provide optimal solutions for high-volume logic design, consumer-facing DSP design, and cost-sensitive embedded applications. Spartan-6 FPGas are the foundation of programmable chips for target-oriented design platforms that provide integrated software and hardware components to enable implementation
Designers focus on innovation as soon as the development cycle begins.
Spartan-6 FPGA Features Summary
•Spartan-6 Family:
Spartan-6 LX FPGA: Logic optimization
•Spartan-6 LXT FPGA: high-speed serial connection
• Designed for low cost
• Multiple efficient integration blocks
• Optimized I/O criteria selection
• Staggered pad
• Large volume plastic wire welding package
Low static and dynamic power consumption
• 45 nm process optimized for cost and low power consumption
• Sleep power off mode, zero power consumption
• The suspended mode can maintain state and configure multi-pin wake-up and control enhancement in the following ways
• Low power 1.0V core voltage (LX FPGA only, -1L)
• High performance 1.2V core voltage (LX and LXT, FPGA-2, -3 and -3N speed classes)
• Multi-voltage, multi-standard SelectIO™ interface library
• Data transfer rate up to 1,080 Mb/s per differential I/O
• Optional output drivers with a maximum of 24 mA per pin
3.3V to 1.2V I/O standards and protocols
• Low cost HSTL and SSTL memory interfaces
• Conforms to hot swap
• Adjustable I/O swing rate to improve signal integrity
• High-speed GTP serial transceivers in LXT FPgas
• Up to 3.2 Gb/s
High-speed interfaces include: Serial ATA, Aurora, 1G Ethernet, PCI Express, OBSAI, CPRI, EPON, GPON, DisplayPort, and XAUI
• Integrated endpoint module for PCI Express design (LXT)
Low-cost PCI® technology is supported with 33 MHz, 32 bit and 64 bit specifications.
• Efficient DSP48A1 slicing
• High-performance arithmetic and signal processing
• Fast 18 x 18 multiplier and 48-bit accumulator
• Pipelining and cascading capabilities
• Preloader to assist filter application
• Integrated memory controller module
•DDR, DDR2, DDR3 and LPDDR support
• Data rates up to 800 Mb/s (12.8 Gb/s peak bandwidth)
• Multi-port bus architecture with independent FIFO reduces design timing issues
• Logical resources are abundant and logical capacity increases
• Optional shift register or distributed RAM support
• Efficient 6-input LUT improves performance and minimizes power
• LUT with dual trigger for pipeline-centric applications
• Block RAM with wide granularity
• Fast block RAM with byte write enable
•18 Kb Block, with the option to program it as two separate 9 Kb Block RAM
• Clock Management Tiles (CMT) enhance performance
• Low noise, flexible clock
Digital Clock Manager (DCM) eliminates clock bias and duty cycle distortion
• Phase locked loop (PLL) for low jitter clocks
• Frequency synthesis, simultaneous multiplication, division and phase shifting
•16 low skew global clock networks
• Simplified configuration to support low cost standards
• 2-pin automatic detection configuration
Extensive third-party SPI (up to x4) and NOR flash support
• Feature-rich Xilinx platform flash with JTAG
•MultiBoot supports multiple bit streams to be upgraded remotely and is protected by a watchdog
• Enhanced security of design protection
A unique device DNA identifier for design authentication
• AES bit stream encryption in large devices
• Faster embedded processing, enhanced low cost
MicroBlaze™ soft processor
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