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GE VMIVME-3122 High Performance 16 Bit Analog to Digital Converter (ADC)

来源: | 作者:FAN | 发布时间 :2025-08-14 | 282 次浏览: | Share:

GE VMIVME-3122 High Performance 16 Bit Analog to Digital Converter (ADC)

Product Overview

VMIVME-3122 is a high-performance 16 bit analog-to-digital converter that supports 64 differential or single ended wide range (± 250 mV to ± 10 V) analog inputs, suitable for fields such as factory automation and instrumentation, process control, laboratory instruments, machine monitoring, and data acquisition.


Core Features

Input and Conversion Performance

Supports 64, 32, or 16 differential or single ended inputs, depending on the selected option.

16 bit A/D conversion, software selectable conversion rate, high-performance option up to 100 kSPS, standard performance option up to 50 kSPS.

The software has programmable gains of 1 and 10, which can be fixed for all channels or individually programmed for each channel.

Jumper selectable A/D range: 0 to+5 V, 0 to+10 V, ± 2.5 V, ± 5 V, and ± 10 V.

Scanning and triggering mode

Scan modes: including AutoScan (default, continuously scans all active channels in order), Single Scan (starts a scan of all selected channels once triggered by trigger mode, stops waiting for the next trigger after completion), Random Access (selects, digitizes, and stores a single channel each time the trigger mode is enabled).

Trigger modes: There are Software Trigger (which starts the selected scanning mode by writing the software trigger address), External Trigger (which starts the selected scanning mode by receiving an external trigger through the P2 connector), and Interval Timer Trigger (which starts the selected scanning mode every time the programming time interval expires).

Data storage and access: 1024 word data buffer (16 word deep buffer x 64 channels), dual port register allows VMEbus to access and read the latest stored data at any time, buffer size and block size can be controlled through configuration control registers (CCR).

Other functions

Programmable VMEbus interrupt, which can generate interrupt requests at the end of buffer scanning or during the collection of a specific number of samples.

User programmable interval timer, with a timing interval of up to 687 seconds.

Optional low-pass filter, input with overvoltage protection.

When powered on, it starts in automatic scanning mode with a gain of 1.

Ordering Options

Input filter options (A): 0 for no filter, 1 for 10 Hz (-3 dB), 2 for 50 Hz (-3 dB), 3 for 100 Hz (-3 dB), 4 for 500 Hz (-3 dB).

Channel quantity options (B): 0 is 64 channel high-performance, 1 is 32 channel high-performance, 2 is 16 channel high-performance, 3 is 64 channel standard performance, 4 is 32 channel standard performance, and 5 is 16 channel standard performance.

Input options (C): 0 is a differential analog input channel with a 96 pin non latch connector, 1 is a single ended analog input channel with a 96 pin non latch connector, 2 is a differential analog input channel with a 64 pin latch connector, and 3 is a single ended analog input channel with a 64 pin latch connector.


Functional feature details

VMEbus related

The address modifier response can be jumper selected as A32, A24, or A16 address space, as well as monitoring or user privileges, or both.

Compliant with VMEbus standard ANSI/IEEE STD 1014-1987 IEC 821 and 297.

Reset operation: When the system is reset or the software reset address is written, a board reset occurs. The reset operation automatically establishes default conditions, including automatic scanning mode, channel block size and data buffer determined by the selected option, gain of 1, and conversion rate of 100 kHz (the standard performance option needs to be set to 50 kSPS or lower after reset). After reset, the ADC will undergo a calibration cycle of 41 ms.

Panel indicator: The front panel LED controlled by the program lights up during the reset period and goes off through CSR.


Input characteristics

Accuracy: The maximum error is ± 0.005% reading ± 0.005% range ± 100 µ V.

Stability: Temperature drift is ± 10 PPM (ADC reading)+± 7.5 PPM (ADC range)+± 2.5 µ V, doubling the frequency in single ended applications.

Common mode/floating input protection: In the high-performance option, the low end of each input is grounded through a 22 M resistor; In the standard performance options, users must control the common mode voltage to prevent input fluctuations.

Input noise: (0.4+0.3/G) mV, where G is the PGA gain, noise is independent of filter options.

Other: The maximum input bias current is 40 nA (at zero input), and the minimum input impedance is 5 M Ω (parallel 50 pF).

Transmission characteristics

Resolution: 16 bits, no missing codes.

Channel crosstalk (DC to 1 kHz): The adjacent channels of the high-performance option (391 to 100 kSPS) are -88 dB, and the alternating channels are -110 dB; the adjacent channels of the standard performance option (50 kSPS) are -50 dB, and the alternating channels are -90 dB; the adjacent channels of the standard performance option (35 kSPS) are -90 dB, and the alternating channels are -96 dB.

Input transfer function:

E IN=E LO+E FSR × 65536N ADC, where E IN is the input voltage, E LO is the lower limit of the input range, E FSR is the full-scale input range, and N ADC is the reading of the A/D converter.

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