XYCOM XVME-957 Circuit Board

XYCOM XVME-957 Circuit Board

Core positioning and purpose

XYCOM XVME-957 is an intelligent multi protocol serial communication controller based on VMEbus.

Its main design purpose is to provide a large, reliable, and flexible serial device connection capability in industrial automation, process control, and data acquisition systems. It is usually used as a slave board, inserted into the VME chassis, and controlled and data exchanged by the main CPU board (such as XVME-976) through the VME bus.

Typical application scenarios:

Connect multiple programmable logic controllers.

Communicate with CNC machine tools and robot controllers.

Connect sensor networks and instruments with serial interfaces (such as flow meters and scales).

As a gateway, connect the serial device network to the upper layer control system based on the VME bus.

Key technologies and hardware specifications

The core value of XVME-957 lies in its highly integrated and intelligent serial communication management.

Core processor: An independent microprocessor (usually a Motorola 68xxx series or specialized communication processor) onboard. This enables it to independently handle complex serial communication protocols, greatly reducing the burden on the main CPU board. This is the symbol of an "intelligent" I/O board.

Bus interface: VMEbus. Interact with other parts of the system (main CPU, memory, etc.) using the VME standard.

Core Function - Serial Channel:

Four independent serial communication channels are integrated on the board.

Each channel is extremely flexible and can support multiple standards and protocols through software configuration:

Electrical standards: RS-232, RS-422, RS-485.

Communication protocol:

Asynchronous mode: Standard start stop communication used to connect most terminals, modems, and simple devices.

Synchronization mode (core feature): Supports advanced bit oriented data link layer protocols such as BISYNC and HDLC/SDLC. This was crucial at the time for connecting IBM mainframes, front-end processors, or building reliable data links.

Programmable parameters: baud rate (usually up to 38.4kbps or higher, which is already quite high at the time), data bits, stop bits, parity, etc. can all be independently set.

Onboard memory: has its own dual port RAM. This is a typical design of an intelligent I/O board that allows the main CPU and onboard processor to efficiently and asynchronously exchange data and commands, avoiding bus conflicts.

Interrupt and DMA support: Supports generating interrupts through the VME bus and may also support direct memory access to achieve high-speed data throughput, further reducing the load on the main CPU.

Industrial grade design: The selection of components and PCB design meet the requirements of industrial environment (wide temperature range, anti vibration, anti-interference).

System composition and working mode

Position in the system: XVME-957 is plugged into a slot on the VME backplane. The main CPU board recognizes it as a slave device or intelligent peripheral through the VME bus.

Drivers and Programming: Users need to install the corresponding device drivers on the operating system of the main CPU (such as VxWorks, QNX, iRMX). Applications configure channels, send and receive data by reading and writing "files" or calling functions through APIs provided by drivers.

Data processing flow:

The main CPU sends commands to the shared memory of XVME-957, such as "Open channel 1, set to RS-485 HDLC mode, baud rate 9600".

The onboard processor of XVME-957 executes commands and independently manages all details of the physical layer and data link layer, such as byte/frame assembly, CRC check, timeout retransmission, etc.

When a complete data frame is received or a specific event occurs, XVME-957 sends an interrupt to the main CPU through the VME bus.

The interrupt service program of the main CPU reads data from the shared memory and passes it to the upper layer application program.

The entire process is like reading and writing a local file or network socket for an application, with complexity isolated by the driver.