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  • GE IS200TRPLH1A TERM BD TRIP PRIMARY LG STM
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  • GE IS200TRPLH1A TERM BD TRIP PRIMARY LG STM

    110V-380V
    5W-130W
    1A-30A
    1 year
    30
    United States, France, Japan, Viet Nam, Australia, Russia, Germany, Italy, Arabia

    GE IS200TRPLH1A TERM BD TRIP PRIMARY LG STM

    • ¥22500.00
      ¥24520.00
      ¥22500.00
      ¥22500.00
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    Weight:4.300KG
    • Quantity:
    • (Inventory: 33)
Description

GE IS200TRPLH1A TERM BD TRIP PRIMARY LG STM


GE IS200TRPLH1A TERM BD TRIP PRIMARY LG STM

Part Number IS200TRPLH1A Manufacturer General Electric Country of Manufacture As Per GE Manufacturing Policy Series Mark VI/VIe Function Module Availability In StockThe GE Mark VI IS200TRPLH1A serves as a primary trip terminal board. General Electric's IS200TRPLH1A board component is used in the company's Mark VI system for regulating industrial gas and steam turbine systems. The Mark VI was one of General Electric's last Speedtronic systems to be developed and released. This board is often only found on steam turbines. It is compatible with Mark VI and Mark VIe systems. 

It is a terminal card for a large steam turbine primary trip. It is the primary Overspeed protection on larger steam turbine systems. The board is controlled by the turbine protection controller card, which is usually a VTUR or PTUR board. It also works in tandem with a TREL board to provide ETDs with emergency/primary interfaces. The TRPL board delivers the negative side of the 125 VDC to the trip solenoids, while the TREL board gives the positive side. Up to three trip solenoids can be connected to these boards. Two big terminal strips with a total of 48 connector points populate the board. 

MOV diodes, resistors, transistors, integrated circuits, wire jumpers, and nine magnetic relays are also included, as well as three-d-shell connectors and other plug connectors. Three voting circuits interface with three trip solenoids via relays. Solenoid suppression and voltage monitoring are included in trip circuits, and solenoids use two out of three contact voting.

Output Functions

The IO module is capable of converting the output signals generated by a computer system or control system into the form required by an external device. These output signals are typically used to control actuators such as motors, valves, lights, etc. By sending appropriate output signals to external devices, the system enables control and operation of the external environment.

Data Acquisition and Processing

The IO module is capable of acquiring data from external devices and transferring it to a computer system or control system for further processing. This enables the system to acquire environmental data, status information and user inputs in real time and make appropriate decisions or perform specific tasks based on these data.

Communication Interfaces

IO modules are usually equipped with different types of communication interfaces, such as serial interfaces (RS232, RS485), Ethernet interfaces, CAN bus interfaces, and so on. These interfaces enable IO modules to exchange data and communicate efficiently with computer systems or other external devices.

OTHER INFORMATION

• Up to 1.26 GHz Pentium® III processor with 256 KB advanced  transfer cache  

• Up to 512 MB PC-133 SDRAM using a single SODIMM  

• Internal AGP SVGA controller with 4 MB display cache  

• 133 MHz system bus via Intel® 815E chipset  

• Dual Ethernet controllers supporting 10BaseT and 100BaseTX  interfaces  

• Optional PCI dual channel Ultra160 SCSI  

• Up to three (two with rear I/O support) PMC expansion sites  (IEEE-P1386 common mezzanine card standard, 5 V)  

• Up to 1 GB bootable flash on secondary IDE (optional)  

• Two 16-bit and two 32-bit programmable timers  

• 32 KB of nonvolatile SRAM  

• Software-selectable watchdog timer with reset  

• Remote Ethernet booting  

• Optional IDE hard disk drive  

• VME64 modes supported:  A32/A24/D32/D16/D08(EO)/MBLT64/BLT32  

• VMEbus interrupt handler, interrupter and system controller  

• Includes real time endian conversion hardware for littleendian and big-endian data interfacing (patent no. 6,032,212)  

• Enhanced bus error handling  

• Passive heat sink

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