SIEMENS C500 microcontroller architecture and instruction set

Most arithmetic instructions affect the flag bits in the program state word (PSW), and engineers must pay attention when writing multi precision or signed operations:

CY (carry flag): When adding, if bit 7 has a carry, set it to 1; When subtracting, if bit 7 needs to be borrowed, set it to 1. The MUL and DIV commands will reset CY to zero.

OV (overflow flag): Used for signed number operations. When two positive numbers add up to a negative number, or when two negative numbers add up to a positive number, set it to 1. In MUL, if the product is greater than 255, OV is set to 1; In DIV, if the divisor is 0, OV is set to 1.

AC (auxiliary carry flag): When adding, if there is a carry from bit 3 to bit 4, set it to 1; When subtracting, if bit 3 needs to borrow from bit 4, set it to 1. Used for BCD adjustment (DA A instruction).

3. Boolean processor: an independent unit for bit operations

The C500 integrates an independent Boolean processor internally, and its accumulator is the CY flag. The bit addressing space (including 128 bits of internal RAM and addressable bits of SFR) constitutes its memory. The Boolean instruction set includes:

Bit transfer: MOV C, bit, MOV bit, C

Position bit/reset: SETB bit, CLR bit, CPL bit

Bit logic operation: ANL C, bit, ORL C, bit and its inverse form ANL C,/bit, ORL C,/bit - the result is saved back to CY.

Conditional jump: JB, JNB, JBC

Using a Boolean processor, C500 can directly perform complex logical judgments and operations on a single I/O pin without the need for byte operations and shifts, greatly improving the efficiency of control code.

4. Application scenarios for controlling transfer instructions

Instruction Type Example Jump Range Typical Applications

Unconditional Long Transfer LJMP addr16 64 KB Full Space Large Program Module Jump

Unconditional absolute transfer of AJMP addr11 2 KB page to save code space, short jump within the same page

Short transfer SJMP rel -128 to+127 byte efficient local loop

Indirect jump JMP @ A+DPTR implementation of multi branch jump table (state machine) based on DPTR index jump

Conditional jump CJNE A, if the comparison of # data and rel is not equal, the jump will occur, which also affects the comparison and branching of byte values in CY implementation

Loop control DJNZ Rn, rel minus one non-zero jumps to achieve precise software delay or counting loops

5. Common Instruction Optimization Techniques

MOVC lookup table: MOVC A, @ A+PC is suitable for local tables with a length not exceeding 256 bytes; MOVC A, @ A+DPTR is suitable for large tables that can be located at any position up to 64 KB.

XCHD Swap Low Half Byte: XCHD A, @ Ri can achieve efficient half byte swapping of BCD codes, commonly used for binary to BCD conversion.

SWAP A: Swapping the high 4 bits and low 4 bits of the accumulator is equivalent to shifting the loop left 4 times, which is very useful for quickly organizing packet formats.

The protection sequence of PUSH/POP: In the interrupt service program, if DPTR needs to be protected, PUSH DPL should be pushed first and then PUSH DPH; When restoring, first POP DPH and then POP DPL. This is opposite to the stacking order of LCALL (PC low byte first in).

Software Development and Debugging Practice

1. C language support for multiple data pointers

When using the C51 compiler, it is usually necessary to manipulate DPSEL through embedded assembly or compiler provided extension keywords. A common practice is to write macros or functions:

c//Attention: Adjustments need to be made according to the specific compiler

#define DPSEL   ((unsigned char __sfr __at(0x92)) 

#define SELECT_DPTR(n) (DPSEL = (n))

//Example usage

SELECT_DPTR(3); //Switch to DPTR3

unsigned int myAddr = 0x1234;

DPTR = myAddr; //Here DPTR actually points to DPTR3

SELECT_DPTR(4); //Switch to DPTR4, keeping the previous DPTR3 value unchanged

Some advanced compilers' library functions may have been optimized for multiple data pointers, automatically recognizing and utilizing idle DPTRs to accelerate memory copy operations.

2. Key points of interrupt service program

Use RETI instead of RET to return. RET will keep the interrupt priority state locked, causing subsequent same level or lower level interrupts to be unresponsive.

If the interrupt hardware does not automatically clear the request flag, the software must clear it before RETI, otherwise it will immediately re-enter the interrupt and cause a dead loop.

Try to keep the interrupt service program short and avoid time-consuming multiplication, division, or long loops within the interrupt.

3. Simulation and debugging suggestions

By utilizing Enhanced Hooks simulation technology, mass production chips are directly used in conjunction with EH-IC for debugging, ensuring consistency between the simulation environment and the final product.

When stepping, pay attention to the value of the DPSEL register to confirm which data pointer is currently being used.

Observing the ALE signal with an oscilloscope can confirm whether external bus access is normal. Under normal circumstances, the ALE frequency should be 1/6 of the crystal oscillator frequency (standard mode).