MOTOROLA MVME162-213 Embedded Controller

MOTOROLA MVME162-213 Embedded Controller

OVERVIEW

The MOTOROLA MVME162-213 Embedded Controller is a high-performance and highly reliable embedded controller belonging to the Emerson/Motorola MVME162 series of dual high VME modules. Below is a detailed overview of its key features and specifications:

Key Features

Processor: It is based on the MC68EC040 or optionally the MC68LC040 microprocessor. These processors offer high computational power and reliability, making the controller suitable for demanding applications.

Memory: The controller features 1MB, 4MB, or 8MB of checksum-protected DRAM, ensuring data integrity. Additionally, it has 512Kb of SRAM with battery backup, providing persistent storage for critical data. Some sources also mention a memory capacity of up to 32MB RAM, indicating that the memory is expandable.

Timing and Clock: It is equipped with a TOD (Time of Day) clock with battery backup, ensuring accurate and stable timekeeping.

I/O Interfaces and Communication Protocols:

The MVME162-213 supports multiple I/O interfaces, including two serial ports (EIA-232-D and EIA-232-D/EIA-530), which can be configured for various serial communication needs.

It also features six timers with scales, providing precise timing capabilities.

Optional interfaces include a LAN Ethernet transceiver interface (DMA) and an SCSI bus interface (DMA), enabling efficient and flexible data transmission.

Communication Protocols: The controller supports various communication protocols such as Ethernet and fiber channel, making it suitable for high-speed and high-capacity data transmission requirements.

Open Computing Principles: The MVME162-213 follows open computing principles, including modularity, scalability, portability, and interoperability. This makes it easier to integrate and expand within systems.

Operating Systems: It supports multiple operating systems such as VxWorks and Linux, allowing for flexibility in development and deployment across different application environments.

Specifications

Processor: MC68EC040 or optional MC68LC040 microprocessor.

Memory: 1MB, 4MB, or 8MB (expandable to 32MB) of DRAM; 512Kb or 128KB of SRAM with battery backup.

I/O Interfaces: Two serial ports, six timers with scales, optional Ethernet and SCSI interfaces.

Power Requirements: Typically +5V DC with a power consumption of 10W.

Operating Temperature Range: -40°C to +85°C (storage) and 0°C to 70°C (operating with forced air cooling).

Dimensions and Weight: Typically 146mm x 100mm x 30mm in size and 500g in weight.

Connectors: Include D-Sub 9-pin, SCSI interface, and RJ-45 for Ethernet connectivity.

Applications

Due to its high reliability and stability, the MOTOROLA MVME162-213 Embedded Controller is suitable for a wide range of applications, including:

Industrial Automation: For monitoring and managing manufacturing processes.

Transportation Systems: For managing traffic signals, street lights, and electronic road signs.

Medical Equipment: For controlling medical imaging devices and laboratory instruments.

Communications Equipment: For embedded communication systems, including network equipment and base station controllers.

Military and Defense: For controlling and monitoring various military equipment and systems.

Aerospace: For flight control systems and navigation systems.

Energy Management: For controlling and monitoring energy production and distribution systems.

Laboratories and Scientific Research: For controlling experimental equipment and data acquisition systems.

Basic Functions

Data buffer: Since the rate of I/O devices is low while the rate of CPU and memory is high, a buffer must be set up in the controller. In the output, the buffer is used to store the data coming from the host at high speed, and then the data in the buffer will be transmitted to the I/O device at the rate of the I/O device; in the input, the buffer is used to store the data coming from the I/O device, and then the data in the buffer will be transmitted to the host at high speed after a batch of data has been received.

Error control: The device controller also manages error detection of data sent from I/O devices. If an error is found in the transmission, the error detection code is usually set and reported to the CPU, which then cancels the transmitted data and transmits it again. This ensures the correctness of the data input.

Data exchange: This refers to the realisation of data exchange between the CPU and the controller, and between the controller and the device. For the former, it is through the data bus, by the CPU in parallel to write data into the controller, or from the controller in parallel to read out the data; for the latter, it is the device will be the data input to the controller, or from the controller to the device. For this purpose, data registers shall be set up in the controller.

Status Description: Identifies and reports the status of the device The controller shall note down the status of the device for the CPU to know. For example, the CPU can start the controller to read data from the device only when the device is in a transmit-ready state. For this purpose, a status register shall be set up in the controller with each bit therein reflecting a particular state of the device. When the CPU reads in the contents of this register, it will know the state of the device.

Receive and recognise commands: The CPU can send many different commands to the controller, and the device controller should be able to receive and recognise these commands. To this end, there should be a corresponding control register in the controller to store the received commands and parameters, and decode the received commands. For example, the disk controller can receive Read, Write, Format and other 15 different commands from the CPU, and some commands also have parameters; accordingly, there are several registers and command decoders in the disk controller.

Address recognition: Just as each unit in memory has an address, so does each device in the system, and the device controller must be able to recognise the address of each device it controls. In addition, in order for the CPU to be able to write to (or read from) registers, these registers should all have unique addresses.